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The ALSE IP provides an efficient way to interconnect an Altera FPGA with a Xilinx/AMD FPGA. Complete interoperability with the Xilinx IP is guaranteed. It can also be used to interconnect two Altera FPGAs together, in replacement of other proprietary or complex High-Speed Serial protocols (like Serial Lite IV or PCIExpress). Another use case would be an Altera High-End or mid-range FPGA to low cost or very low power FPGA from another vendor.
ALSE Advanced Logic Synthesis for Electronics
Key Features
- Aurora 8B/10B complete protocol support with all configuraitons
Offering Brief
Offering Brief
| Device Family | Agilex® 3 FPGA C-Series, Agilex® 5 FPGA D-Series, Agilex® 5 FPGA E-Series, Agilex® 7 FPGA F-Series, Agilex® 7 FPGA I-Series, Agilex® 7 FPGA M-Series, Agilex® 9 FPGA Direct RF-Series, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX FPGA, Arria® II GX FPGA, Arria® V GT FPGA, Arria® V GX FPGA, Arria® V GZ FPGA, Arria® V ST FPGA, Arria® V SX FPGA, Cyclone® V E FPGA, Cyclone® V GT FPGA, Cyclone® V GX FPGA, Cyclone® V SE FPGA, Cyclone® V ST FPGA, Cyclone® V SX FPGA |
|---|---|
| Offering Status | Production |
| Integrated Testbench | Yes |
| Design Examples Available | Yes |
| Intertop | with Xilinx IP |
| Latest Quartus Version Supported | 25.3.1 |
| OS Support | Linux,Windows |
| Development Language | Encrypted VHDL, Other |
Depends on licensing scheme selected. Technical Support always included.
Ordering Information
AURORA8
from Direct
Documentation & Resources
Market Segment and Sub-Segments
Aerospace
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ASIC Proto
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Consumer
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Defense
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Industrial
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Medical
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Test
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Transportation
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Non-Automotive Transportation
Transportation Infrastructure (non-charging)