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AGSTU Sierra™ is a hardware-implemented real-time kernel and RTOS accelerator designed for demanding embedded systems and FPGA-based applications. Built from multiple parallel-executing hardware units, it delivers deterministic real-time behavior, ultra-low latency (typically 1–4 bus cycles per kernel call), and highly predictable timing performance. Sierra can operate either as a stand-alone real-time kernel or as a hardware accelerator for traditional RTOS solutions. The technology is delivered as a portable FPGA IP core with a simple and flexible bus interface for straightforward system integration. Optimized for FPGA-Based Embedded Systems AGSTU Sierra™ is optimized for FPGA implementation, combining a minimal memory footprint with a lightweight and user-friendly C API. By moving critical RTOS functionality into hardware, Sierra reduces software overhead and improves interrupt handling, task scheduling performance, and deterministic behavior. The architect...
AGSTU AB
AGSTU Sierra™ is a hardware-implemented real-time kernel and RTOS accelerator designed for demanding embedded systems and FPGA-based applications. Built from multiple parallel-executing hardware units, it delivers deterministic real-time behavior, ultra-low latency (typically 1–4 bus cycles per kernel call), and highly predictable timing performance. Sierra can operate either as a stand-alone real-time kernel or as a hardware accelerator for traditional RTOS solutions. The technology is delivered as a portable FPGA IP core with a simple and flexible bus interface for straightforward system integration. Optimized for FPGA-Based Embedded Systems AGSTU Sierra™ is optimized for FPGA implementation, combining a minimal memory footprint with a lightweight and user-friendly C API. By moving critical RTOS functionality into hardware, Sierra reduces software overhead and improves interrupt handling, task scheduling performance, and deterministic behavior. The architecture supports efficient system integration, runtime deadline control, and advanced RTOS extensions, enabling high-performance and time-predictable embedded systems. To simplify development and verification, AGSTU Sierra™ is delivered with integrated logging functionality and a dedicated regression test framework for automated validation and testing of RTOS functionality and hardware/software integration.
Key Features
- No CPU overhead for clock-tick processing, task scheduling, queue management…
- Deadline control in Hardware and overload monitoring
- Most AGSTU Sierra™ services execute in only 2–4 clock cycles
- Direct task activation from external hardware signals — no IRQ/ISR path required
- Simple FPGA integration with validation support through a regression testbench framework
- Built-in event logging with high-resolution timestamp support
Offering Brief
Offering Brief
| Device Family | Agilex® 3 FPGA C-Series, Agilex® 5 FPGA D-Series, Agilex® 5 FPGA E-Series, Agilex® 7 FPGA F-Series, Agilex® 7 FPGA I-Series, Agilex® 7 FPGA M-Series, Agilex® 9 FPGA Direct RF-Series, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX FPGA, Arria® II GX FPGA, Arria® II GZ FPGA, Arria® V GT FPGA, Arria® V GX FPGA, Arria® V GZ FPGA, Arria® V ST FPGA, Arria® V SX FPGA, Cyclone® 10 GX FPGA, Cyclone® 10 LP FPGA, Cyclone® II FPGA, Cyclone® III FPGA, Cyclone® III LS FPGA, Cyclone® IV E FPGA, Cyclone® IV GX FPGA, Cyclone® V E FPGA, Cyclone® V GT FPGA, Cyclone® V GX FPGA, Cyclone® V SE FPGA, Cyclone® V ST FPGA, Cyclone® V SX FPGA, MAX® 10 FPGA, Stratix® 10 AX FPGA, Stratix® 10 DX FPGA, Stratix® 10 GX FPGA, Stratix® 10 SX FPGA, Stratix® 10 TX FPGA, Stratix® III FPGA, Stratix® IV E FPGA |
|---|---|
| Offering Status | Production |
| Integrated Testbench | Yes |
| Evaluation License | Yes |
| Design Examples Available | Yes |
| Demo | Yes |
| Latest Quartus Version Supported | 25.1.1 |
| OS Support | Sierra real-time kernel |
| Development Language | C/C++, VHDL |
Encrypted netlist (Intellectual Property Cores). Fully functional with timeout
Lightweight software drivers
Logging framework
Regression testbench framework
FPGA integration support
HW/SW integration examples
Documentations
Ordering Information
AGSTU Sierra™ for Nios® V — Evaluation Edition
from Direct
AGSTU Sierra™ for Nios® V — Evaluation Edition
from EDA/IDE/Software
Documentation & Resources
Market Segment and Sub-Segments
Aerospace
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ASIC Proto
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Consumer
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Data Center Cloud (Public, Private, Hybrid)
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Data Center OEM (IHV, ISV, SI, VAR)
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Defense
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Industrial
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Medical
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Test
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Transportation
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Automotive (Passenger Vehicles)
Non-Automotive Transportation
Transportation Infrastructure (non-charging)
