FPGA Acceleration with Intel oneAPI

Overview Key Features Offering Brief What's Included Ordering Information Documentation & Resources Markets

FPGA Authority

Member

This course provides engineers and architects with the knowledge and hands-on experience needed to develop high performance FPGA acceleration solutions using Intel’s oneAPI toolkit. Students will learn to write DPC++/SYCL kernels, optimize FPGA pipelines, use the oneAPI FPGA emulator and simulator, and navigate the icpx compiler pipeline from kernel development through hardware synthesis. This course is the designated successor to the Altera OpenCL introductory course. The OpenCL based programming model for Altera FPGAs has been deprecated by Altera. Altera has transitioned to oneAPI and SYCL as the primary FPGA acceleration programming model. Students learning OpenCL today are learning a deprecated path for new designs — this course closes that gap with a modern, supported, and production ready programming model.

View Partner Website

Partner Product Page

Contact Now

Contact FPGA Authority

We collect personal information from you, including identifiers and geolocation data, to enhance your experience, provide customer support, and analytics. We may share this data with third-party providers. For more information, please see our Privacy Policy.

LeadSource

ASAP Account ID

Record Type Name

Key Features

Offering Brief

Device Family	Agilex® 3 FPGA C-Series, Agilex® 5 FPGA D-Series, Agilex® 5 FPGA E-Series, Agilex® 7 FPGA F-Series, Agilex® 7 FPGA I-Series, Agilex® 7 FPGA M-Series, Agilex® 9 FPGA Direct RF-Series, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX FPGA, Arria® V GT FPGA, Arria® V GX FPGA, Arria® V GZ FPGA, Arria® V ST FPGA, Arria® V SX FPGA, Cyclone® 10 GX FPGA, Cyclone® 10 LP FPGA, Cyclone® IV E FPGA, Cyclone® IV GX FPGA, Cyclone® V E FPGA, Cyclone® V GT FPGA, Cyclone® V GX FPGA, Cyclone® V SE FPGA, Cyclone® V ST FPGA, Cyclone® V SX FPGA, MAX® 10 FPGA, Stratix® 10 AX FPGA, Stratix® 10 GX FPGA, Stratix® 10 SX FPGA, Stratix® 10 TX FPGA, Stratix® IV GX FPGA
Offering Status	Production
Prerequisites	Proficiency in C++, experience with parallel programming concepts, familiarity with Linux command line tools and a basic understanding of computer architecture.
Languages	English
Target Audience	Hardware and Software Engineers, FPGA Designers, SoC Developers and System Architects
Duration	2 Days
Hands On Lab	True
OS Support	Windows,Linux

PDF of slides, lab manual and lab files where applicable

Ordering Information