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XIP7213E: IPsec AES256-GCM (Standalone IPsec)

Xiphera Ltd.

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IPsec (Internet Protocol Security) is a widely implemented protocol to secure communications across the Internet. Xiphera’s IPsec IP core enhances secure communication at layer three (Network) of the OSI model, ensuring the authenticity and confidentiality of data traffic. It leverages the Advanced Encryption Standard (AES) in Galois Counter Mode (GCM) with a 256-bit key length, to secure device communications with the IPsec protocol.

Xiphera’s scalable extreme-speed IPsec IP cores are tailored for high-bandwidth applications, ranging from 10 Gbps to 200 Gbps links. Designed for seamless integration, our IP cores support a vendor-agnostic design methodology, making them adaptable across various high-end FPGA or ASIC environments.

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Key Features

  • Performance: The extreme-speed XIP7213E achieves a throughput exceeding 100 Gbps range in modern high-end FPGAs and ASIC process nodes. Notably XIP7213E does not require any extra idle cycles, even when it processes short packets.
  • Standard Compliance: XIP7213E is compliant with the IPsec protocol as standardised in RFC4303 [4] / RFC4306[3]. The cipher suite (GCM-AES-128/192/256) is fully compliant with the Advanced Encryption Algorithm (AES) standard [1], as well as with the Galois Counter Mode (GCM) standard [2].
  • Fully standalone IPsec engine, requiring no external CPU or software intervention for packet encryption, authentication, or flow management, offers performance, security, low power consumption and ease of validation.
  • Flexible key management interface with IKEv2 support, enabling smooth integration with existing security frameworks and automated key lifecycle handling.
  • CAVP validated: The underlying cryptographic algorithm implementations in the XIP7213E have received [5] Cryptographic Algorithm Validation Program (CAVP) [6] validation.
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Offering Brief

Offering Brief

Device Family Agilex® 3 FPGA C-Series, Agilex® 5 FPGA D-Series, Agilex® 5 FPGA E-Series, Agilex® 7 FPGA F-Series, Agilex® 7 FPGA I-Series, Agilex® 7 FPGA M-Series, Agilex® 9 FPGA Direct RF-Series, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX FPGA, Arria® V GT FPGA, Arria® V GX FPGA, Arria® V GZ FPGA, Arria® V ST FPGA, Arria® V SX FPGA, Cyclone® 10 GX FPGA, Cyclone® 10 LP FPGA, Cyclone® IV E FPGA, Cyclone® IV GX FPGA, Cyclone® V E FPGA, Cyclone® V GT FPGA, Cyclone® V GX FPGA, Cyclone® V SE FPGA, Cyclone® V ST FPGA, Cyclone® V SX FPGA, MAX® 10 FPGA, MAX® V CPLD, Stratix® 10 AX FPGA, Stratix® 10 GX FPGA, Stratix® 10 MX FPGA, Stratix® 10 SX FPGA, Stratix® 10 TX FPGA, Stratix® IV GX FPGA
Offering Status Production
Integrated Testbench Yes
Evaluation License Yes
Design Examples Available Yes
Compliance Yes
Latest Quartus Version Supported 26.1.0
Development Language Encrypted Verilog, Encrypted VHDL, Verilog, VHDL

Encrypted RTL or source code

Optional netlist

Sample synthesis scripts

Instantiation file

Comprehensive simulation test bench, scripts & guide

Detailed datasheet and integration guide

Ordering Information

XIP7213E

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Documentation & Resources

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