Questa*-FPGA Edition Software

Questa*-FPGA Edition Debug Demo

Watch this video for the new features supported in Questa*- FPGA Edition.

Migrating from ModelSim* FPGA Edition Software to Questa*-FPGA Edition Software

Watch this video to find out how easy it is to migrate to Questa*-FPGA Edition, and also review the quick start guide for instructions on how to get started.

Questa*-FPGA Edition Quick-Start Guide

Key Features

Mixed-Language Simulation

Run simulations across Verilog, SystemVerilog, and VHDL in a unified environment.

Precompiled Libraries

Use ready-to-go simulation libraries tailored for Altera devices—no setup needed.

NativeLink Integration with Quartus® Prime

Launch simulations directly from Quartus for a seamless verification flow.

Behavioral and Gate-Level Simulation

Validate functionality and timing accuracy at every stage of design.

HDL Testbench Support

Build and simulate testbenches to ensure robust functional coverage.

Waveform Debugging and GUI

Analyze signals with an intuitive GUI for faster debug and visualization.

Benefits

Questa*- FPGA Edition Software
  • Up to 2.5x/1.25 x faster Verilog/VHDL simulations compared to ModelSim*– FPGA Edition.
  • Note: Performance measured by Siemens EDA. Performance is highly design-dependent and was measured by Siemens across 3 designs. Individual results may be higher or lower. No line limitations.
  • Free with purchase of Quartus® Prime. Also available for separate purchase. Buy here.
  • Note: Questa*- FPGA Edition software license expires 12 months after the date of purchase. Every 12 months you must regenerate your license file in the Self-Service Licensing Center for the specific Questa*- FPGA Edition software version that you purchased.
  • Mixed language support – Verilog/SystemVerilog, VHDL and SystemC.
Questa*- FPGA Starter Edition Software
  • No line limitations.
  • 40% performance (on average) of Questa*- FPGA Edition Software.
  • Log into Self Service Licensing Center to get free one-year license.
  • Renew in SSLC annually, after one year. Click on Evaluation and Free Licenses tab in SSLC.
  • Mixed language support – Verilog/SystemVerilog, VHDL and SystemC.