The Interlaken FPGA IP core is Interlaken Protocol Definition v1.2 compliant and allows system developers to achieve high-bandwidth throughput in their systems. This pre-built, ready-to-go IP building block shortens the design cycle resulting in faster time to market. Interlaken is an interconnect protocol for high-speed, channelized chip-to-chip interface in networking applications. It is optimized for high-bandwidth chip-to-chip packet transfers at rates from 10 Gbps to 600 Gbps and beyond. The Interlaken FPGA IP core is ideal for: 1) Multi-terabit routers and switches for access, 2) Carrier Ethernet and data center applications that demand IP configurability to optimize for various traffic profiles, and 3) Scalability for next-generation platforms. The Altera Interlaken IP Portfolio accomplishes major development milestones: third-generation soft IP (includes media access control (MAC)) and second-generation hardened IP (includes physical coding sublayer (P...
The Interlaken FPGA IP core is Interlaken Protocol Definition v1.2 compliant and allows system developers to achieve high-bandwidth throughput in their systems. This pre-built, ready-to-go IP building block shortens the design cycle resulting in faster time to market. Interlaken is an interconnect protocol for high-speed, channelized chip-to-chip interface in networking applications. It is optimized for high-bandwidth chip-to-chip packet transfers at rates from 10 Gbps to 600 Gbps and beyond. The Interlaken FPGA IP core is ideal for: 1) Multi-terabit routers and switches for access, 2) Carrier Ethernet and data center applications that demand IP configurability to optimize for various traffic profiles, and 3) Scalability for next-generation platforms. The Altera Interlaken IP Portfolio accomplishes major development milestones: third-generation soft IP (includes media access control (MAC)) and second-generation hardened IP (includes physical coding sublayer (PCS) / physical medium attachment (PMA)). These seasoned, battle-tested cores continue to provide the additional robustness and maturity required for new, more intelligent systems.