partner-offering-banner.png

HDMI IP Core

Altera

The Altera® FPGA High-Definition Multimedia Interface (HDMI) IP provides support for next-generation video display interface technology. The HDMI Altera® FPGA IP is part of the Altera® FPGA IP Library, which is distributed with the Quartus® Prime software.

Key Features

  • Supports color with 8, 10, 12, or 16 bits per color (bpc) and includes RGB and YCbCr 444, 422, and 420 color modes.
  • Allows 1, 2, 4, or 8 symbols per clock for flexible data processing.
  • Supports video up to 8K resolution for high-quality output.
  • Handles up to 32 channels of embedded audio for enhanced audio capabilities.
Expand Close
Keyfeatures main image

Offering Brief

Offering Brief

Device Family Agilex® 7 FPGA F-Series, Agilex® 7 FPGA I-Series, Agilex® 7 FPGA M-Series, Arria® 10 GX FPGA, Arria® 10 SX FPGA, Arria® V GX FPGA, Cyclone® 10 GX FPGA, Stratix® 10 AX FPGA, Stratix® 10 DX FPGA, Stratix® 10 GX FPGA, Stratix® 10 SX FPGA, Stratix® 10 TX FPGA, Stratix® V GX FPGA
Offering Status Production
Integrated Testbench Yes
Evaluation License Yes
Design Examples Available Yes
Demo Yes
Development Language VHDL, Verilog

Encrypted Verilog source code

Design Example

Simulation Models

Documentation: IP User Guide, Design Example User Guide, IP Release Notes

Ordering Information

Market Segment and Sub-Segments