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Development Software
Altera FPGA Add-on for oneAPI Base Toolkit
Overview
DISCONTINUED - FPGA AI Inference Development Flow
The Altera FPGA Add-on for the oneAPI Base Toolkit empowers developers to harness the performance and flexibility of FPGAs using a unified, standards-based programming model. By leveraging Data Parallel C++ (DPC++) and the SYCL standard, this add-on simplifies cross-architecture development, enabling efficient acceleration of data-centric workloads across CPUs, GPUs, and FPGAs.
Benefits
Unified Programming Model
Develop applications across diverse architectures (CPU, GPU, FPGA) using a single codebase with DPC++, reducing complexity and development time.
High-Level FPGA Development
Utilize familiar C++ constructs and SYCL extensions to program FPGAs, eliminating the need for low-level HDL coding.
Seamless Integration with Altera Tools
Integrates with various tools for performance analysis and optimization across architectures.
Key Features
| Data Parallel C++ (DPC++) Compiler | Compile C++ and SYCL code for FPGAs, enabling code reuse and efficient parallel programming. |
| FPGA Emulation and Reports | Perform functional and performance validation through CPU-based emulation before deploying to FPGA hardware. |
| Customizable FPGA Kernels | Optimize FPGA kernels with attributes, pragmas, and extensions to fine-tune performance and resource utilization. |
| Integration with Quartus® Prime | Leverage the FPGA design suite for synthesis, place-and-route, and bitstream generation directly from DPC++ code. |
| Support for DevCloud | Access FPGA hardware and development tools in the cloud for testing and validation without local hardware requirements. |
