Simics for SoC FPGA Software Testing

Q: When should Simics be used instead of Questa for a SoC FPGA project?

Use Simics for system software on modeled hardware. Use Questa for HDL verification of FPGA logic and interfaces.

Q: What is the relationship between the Simics virtual platform and an Agilex 5 GHRD?

The example virtual platform models the referenced hardware design. Custom board changes require corresponding model updates for meaningful software testing.

Q: How does a developer add a custom FPGA peripheral to a virtual platform?

Create or adapt a supported model implementing its registers and behavior, then connect it into the virtual system's address map.

Q: How does a team investigate software that runs in Simics but fails on hardware?

Compare modeled peripherals, boot configuration, timing assumptions and drivers with the board. A passing model cannot prove physical interface behavior.

Q: When should Simics results be supplemented by real-board testing?

Use board tests for physical interfaces, timing-sensitive interactions and hardware performance. Retain virtual tests for repeatable software regressions.

Software & Tools

Intel* Simics* Simulator for Altera® FPGAs is a full-system simulator supporting the definition, development, and deployment of virtual platforms, enabling early product development and reducing product time to market.

Read the User Guide

Explore the Intel Simics Simulator for Altera FPGAs

The Intel* Simics* Simulator for Altera^® FPGAs is a full-system simulator supporting the definition, development, and deployment of virtual platforms. The simulator runs unchanged target binaries in a fast and controllable way, providing an ideal environment for early software development and testing pre-silicon and post-silicon, and even post-availability. The virtual platforms can be used throughout the product life cycle, from the earliest product architecture through design and evaluation, to firmware development, and OS bring-up, and finally to modeling actual customer systems and full-system integration. With the Intel Simics Simulator for Altera FPGAs, you can have your software available by the time that the new silicon arrives, reducing your product time-to-market.

Architecture

The Intel Simics Simulator for Altera FPGAs is built from five layers.

HPS	A model of the Agilex^® 5 SoC FPGA E-Series HPS, including all the sub-systems that integrate this.
HPS Subsystem	This corresponds to the model of the sub-system that includes all the components directly associated with the HPS in the E-Series device.
Target Software	This corresponds to the model of the logic that is implemented in the FPGA fabric. This is not implemented as a single component, but instead, each one of the modules included in this model is instantiated individually.
User Interface	Includes components that allow the user to interact with the simulator. This interaction can be done using a graphical user interface (GUI) from which you can control the execution of the simulation and perform any debug activity.
Simulator Infrastructure	It is integrated by components that include a Python interpreter, RiscFree IDE, Service node, etc. Simulator infrastructure consists of a large set of features that Simics simulator makes available to the users providing an aggregated value to the tool.

Benefits

Shorten Development Time

Virtual platforms reduce constraints and shorten development time by:

Enabling early software development before physical hardware is available.
Allowing hardware and software integration to start earlier.
Accelerating development with an industry-standard debug environment.

Reduced Risk and Cost

Virtual platforms reduce resource risk and cost by:

Having the ability to identify and fix issues early in the product development stage.
Eliminating the need for physical FPGA development boards.
Having software and hardware development in parallel.
Having unique correlated visibility of software and hardware.
Using existing development tools.

Ease of Collaboration

Virtual platforms provide ease of collaboration by:

Having a development environment with global remote access, parallel development with real-time collaboration, code integration, and scenario-sharing capabilities.
Offering team members the ability to have their own personal virtual environment to share and collaborate in real-time, improving productivity.
Having familiar development tools and runtime software.

Key Features

The Agilex^® 5 device E-Series virtual platform is made up of the following components, each modeling a part of the real hardware design.

Component	Description
HPS	A model of the Agilex^® 5 SoC FPGA E-Series HPS, including all the subsystems that integrate this.
HPS Subsystem	This corresponds to the model of the subsystem that includes all the components directly associated with the HPS in the E-Series device.
FPGA Fabric Design	This corresponds to the model of the logic that is implemented in the FPGA fabric. This is not implemented as a single component, but instead, each one of the modules included in this model is instantiated individually.
qsys_top	This corresponds to the view of the design being modeled and corresponds to the system seen from the Platform Designer under the GHRD (soc_inst). Under this component are instantiated components such as the HPS subsystem and the FPGA fabric design.
FPGA	A model that represents the top-level view of the hardware design from the FPGA device perspective, corresponding to the GHRD in the Quartus^® Prime software project for the E-Series device. This model instantiates the qsys_top component.
Board	A model of a board that contains an E-Series device. This model integrates the FPGA model with board components such as flash devices (SD Card, QSPI, and NAND), USB disks, Ethernet PHY, and connectors.
System	A model that represents the complete system. This instantiates the board component and any other component not included in the board component.
Target Script	The virtual platform includes a wrapper called a target script, in which the system component is instantiated. In this script, the values of user-configurable parameters are defined. Also, any initial simulation setup and any automation tasks are performed.

Simics Virtual Platform in Action

Early Development with Simics Virtual Platform for E-Series Devices
The virtual platform matches the architecture defined in the Quartus^® Prime project Golden Hardware Reference Design (GHRD), allowing early product design before the hardware is available.

Download and Install