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Cyclone® V GX
Design low-power connectivity systems with Cyclone® V GX FPGAs. Explore serial transceivers up to 3.125 Gbps, PCIe hard IP, and embedded processing options.
Explore Cyclone V GX FPGAs
The Cyclone® V GX FPGA is a cost-sensitive, low-power platform built on TSMC's 28 nm low-power process. It combines flexible programmable logic, variable-precision DSP blocks, up to 13.59 Mb of embedded memory, PCIe hard IP, and low-power transceivers supporting data rates from 614 Mbps to 3.125 Gbps for embedded systems that require efficient real-time processing and high-speed connectivity.
Key Features
| Internal memory blocks | M10K: 10-kilobits (Kb) memory blocks with soft error correction code (ECC). Memory logic array block (MLAB): 640-bit distributed LUTRAM where you can use up to 25% of the ALMs as MLAB memory. |
| General-purpose I/Os | 875 megabits per second (Mbps) low-voltage differential signaling (LVDS) receiver and 840 Mbps LVDS transmitter. 400 MHz/800 Mbps external memory interface. On-chip termination (OCT). 3.3 V support with up to 16 mA drive strength. |
| PCIe Hard IP | Cyclone V GX devices contain PCIe hard IP that is designed for performance and ease-of-use. The PCIe* hard IP consists of the MAC, data link, and transaction layers. |
| Low-power serial transceivers | Cyclone V devices deliver the industry’s lowest power 6.144 Gbps transceivers at an estimated 88 mW maximum power consumption per channel. |
Benefits
Do More with Less Power, Design Time, and Cost
It is built on TSMC's 28 nm low-power (28LP) process technology, including hard intellectual property (IP) blocks, allowing you to differentiate and do more.
Logic Integration and Differentiation Capabilities
It offers an 8-input adaptive logic module (ALM) and variable-precision digital signal processing (DSP) blocks, allowing up to 13.59 megabits (Mb) of embedded memory.
Increased Bandwidth Capacity
With hard memory controllers, leverage increased transceiver bandwidth capacity ranging from 614 Mbps to 3.125 Gbps.
Product Package & Combination Selector
Start Design
Start developing with Cyclone V GX FPGAs with these resources.
Applications
Cyclone® V GX FPGAs for Industrial
Cyclone® V GX FPGAs for Broadcast and Pro AV
Cyclone® V GX FPGAs for Medical
Resources
Documentation, downloads, videos, training, and support for Cyclone V GX FPGA
Common Questions
Choose GX when integrated Arm HPS is unnecessary. Choose SX when software processing and supported serial connectivity must share a SoC.
Use the GX entry in the device overview and datasheet. Higher-rate GT capability does not apply automatically to GX.
Check reset timing, reference clocks, lane wiring, IP setup and host compatibility, then inspect physical and protocol status.
Use PCIe hard IP for supported PCIe transactions. General serial logic must still implement any required protocol functions correctly.
Transceivers and programmable logic can combine custom interfaces and buffering. Verify rate, electrical and protocol compatibility before selection.