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Stratix® 10 DX
Data-center-optimized FPGAs with PCIe* 4.0, Ultra Path Interconnect, and in-package HBM2 for accelerated infrastructure.
Explore the Stratix® 10 DX FPGA
Stratix® 10 DX FPGAs and SoC FPGAs enable next-generation, high-bandwidth applications including cache-coherent accelerators, custom servers for cloud providers, and high-performance SmartNICs. These are the first FPGA devices to support direct coherent interconnect with server-class processors. They also feature PCIe 4.0 x16 interfaces for high-throughput connectivity.
Key Features
| Coherent CPU Integration | Supports cache-coherent interconnect protocols for direct links to server-class processors, enabling lower latency and higher system performance. |
| PCIe 4.0 Connectivity | Delivers up to 2× more bandwidth with PCIe 4.0 x16, enabling faster data transfer for high-throughput applications. |
Benefits
High-Speed PCIe and Processor Connectivity
Enables high-performance connectivity and data movement with integrated PCIe, transceiver, and coherent processor interfaces to support advanced system architectures.
Low-Latency Coherent Integration
Provides a flexible platform that integrates processing, memory, and interface resources, allowing designers to optimize for a wide range of compute and acceleration workloads.
High-Bandwidth Memory Performance
Supports in-package HBM2 and a range of external memory options, delivering the memory bandwidth that data-intensive workloads such as analytics, storage, and networking acceleration need, while keeping board space and power in check.
Product Package & Combination Selector
Start Design
Everything you need to begin a Stratix 10 DX FPGA design.
PCIe 4.0 Hard IP
Provides scalable bandwidth for next-gen data movement.
FPGA Developer Site
GitHub site that provides a single location for developers to find and use Altera example designs, software, drivers, and associated collateral.
FPGA Design Store
Jumpstart your project with the latest design examples targeting Quartus® Prime Design Software v16.0 and above.
Solutions
Stratix 10 DX FPGAs for Wireline
Stratix 10 DX FPGAs for Wireless
Stratix 10 DX FPGAs for Data Center
Resources
Start developing with Stratix 10 DX FPGAs with these resources.
Training & Learning
Common Questions
Choose DX when its supported host-interface or coherent-platform features are needed. Verify the selected part and server compatibility.
A compatible FPGA implementation, processor platform and software stack are required. The page's general coherence claim does not establish universal host support.
Payload throughput includes transaction, DMA and host-memory effects. Measure the real workload rather than equating link bandwidth with processing capacity.
Check reset and power sequencing, programmed image, reference clock and host enumeration logs before testing higher-level software.
Process locally when data-path work and latency goals justify it. Include local buffering and control-plane update requirements in the architecture.