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Agilex® 7 FPGA Board Design Guided Journey

The interactive FPGA Board Guided Journey provides step-by-step guidance for developing printed circuit boards (PCBs) using Agilex® 7 FPGA devices.

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Before you Begin Review Key Device Documents Review Reference Board Examples Estimate Power and Determine Thermal Requirements Finalize FPGA and Board Features Review General Information Review Feature Information Perform SI and PI Simulations Run IBIS Simulations Run Simulations Create Schematic and Layout Review Pin Information Download Schematic Resources Download Layout Resources Perform Board Validation Check Requirements Compliance Run Boundary-Scan Tests (BST)
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Please select the desired journey step from the flowchart to view the applicable assets.

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Please select the desired Before you Begin sub-step from the flowchart to the left to view the applicable assets:

  • Review Key Device Documents
  • Review Reference Board Examples
  • Estimate Power and Determine Thermal Requirements
info

Please select the desired Finalize FPGA and Board Features sub-step from the flowchart to the left to view the applicable assets:

  • Review General Information
  • Review Feature Information
info

Please select the desired Perform SI and PI Simulations sub-step from the flowchart to the left to view the applicable assets:

  • Run IBIS Simulations
  • Run Simulations
info

Please select the desired Create Schematic and Layout sub-step from the flowchart to the left to view the applicable assets:

  • Review Pin Information
  • Download Schematic Resources
  • Download Layout Resources
info

Please select the desired Perform Board Validation sub-step from the flowchart to the left to view the applicable assets:

  • Check Requirements Compliance
  • Run Boundary-Scan Tests (BST)
Product Information
picture_as_pdfPackage, Pinout, and PCB Design User Guide
picture_as_pdfDevice Overview
picture_as_pdfF-Series and I-Series Device Data Sheet
picture_as_pdfM-Series Device Data Sheet
listKnown Issue List
Family and Migration Information
picture_as_pdfGeneral Information on Migration Types
picture_as_pdfF-Series Product Table
picture_as_pdfI-Series Product Table
picture_as_pdfM-Series Product Table
listSpecific Migration Guidelines
Reference Board Examples
listFPGA Board References and Examples
Power Management and Power Dissipation
picture_as_pdfPower Management User Guide
picture_as_pdfPower Distribution Network Design Guidelines
picture_as_pdfPower and Thermal Analyzer User Guide
picture_as_pdfPower Analysis and Optimization User Guide
picture_as_pdfPower Sequencing Considerations
infoPower and Thermal Analyzer (PTA) Software
Thermal Design Resources
picture_as_pdfRemote Temperature Sensing Diode Implementation Guide
picture_as_pdfPower and Thermal Analyzer User Guide
lockCompact Thermal Models (Sign-in and NDA Required)
General Guidelines
picture_as_pdfDevice Design Guidelines
picture_as_pdfBoard Design Guidelines
Power Management
picture_as_pdfPower Management User Guide
picture_as_pdfPower Distribution Network Design Guidelines
infoSmartVID and Power Regulator Design Guidance
picture_as_pdfSmartVID Debug Checklist and Voltage Regulator Guidelines
picture_as_pdfPower Sequencing Considerations
Configuration
picture_as_pdfConfiguration User Guide
picture_as_pdfSmartVID Debug Checklist and Voltage Regulator Guidelines
External Memory Interface (EMIF)
picture_as_pdfF-Series and I-Series FPGA EMIF IP User Guide
picture_as_pdfF-Series and I-Series FPGA EMIF IP Core Release Notes and Speed Support
picture_as_pdfM-Series FPGA EMIF IP User Guide
picture_as_pdfM-Series FPGA EMIF IP Core Release Notes and Speed Support
articleF-Series and I-Series Pin Information of Supported Memory Schemes
picture_as_pdfM-Series Pin Information of Supported Memory Schemes (in UG)
Transceiver / Tile
picture_as_pdfHigh-Speed Serial Interface Signal Integrity Design Guidelines
listE-Tile Documents and Resources
listP-Tile Documents and Resources
listF-Tile Documents and Resources
listR-Tile Documents and Resources
Hard Processor System (HPS)
listHard Processor System (HPS) Resources
General SI and PI Information
infoSignal and Power Integrity Support Center
IBIS
listIBIS Models and Package RLC Values
articleNet Length Reports (Package Deskew)
Channel
infoAdvanced Link Analyzer
picture_as_pdfAdvanced Link Analyzer User Guide
Power Integrity
picture_as_pdfBoard Power Delivery Network Design Guidelines
Pin Information
picture_as_pdfF-Series and I-Series Device Family Pin Connection Guidelines
picture_as_pdfM-Series Device Family Pin Connection Guidelines
listPinouts
Schematic Resources
listCadence* Capture CIS Schematic Symbols
articleF-Series and I-Series Device Schematic Review Worksheet
articleM-Series Device Schematic Review Worksheet
Layout Resources
listPackage Mechanical Drawings
listPackage Ball Coordinates
listPCB Footprints
lockLand Pattern Recommendations (Sign-in and NDA Required)
Board Bring Up Tools
infoTransceiver Toolkit
picture_as_pdfF-Series and I-Series EMIF Toolkit and Debug- see section 11
picture_as_pdfM-Series EMIF Toolkit and Debug - see section 11
infoSystem Console
Boundary-Scan Tests Resources
infoBoundary Scan Information for FPGAs
listBSDL Models
Related Links
  • Agilex 7 System Architecture Guided Journey
  • Agilex 7 Software Development Guided Journey
  • Agilex 7 FPGA Application Design Guided Journey
  • Agilex 7 FPGA Interface Protocol Design Journey
  • Agilex 7 FPGA AI Design Guided Journey
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