Power and Cost-Optimized FPGA and SoC FPGA

Cyclone^® V

Q: When should a Cyclone V design use an FPGA-only variant rather than a SoC?

Choose FPGA-only when a hard Arm processor is unnecessary. Choose a SoC variant when integrated software control or processing benefits the system.

Q: What is the difference between Cyclone V SE, SX, and ST serial connectivity?

SE lacks hard serial transceivers. SX supports documented 3.125 Gbps links. ST supports up to 6.144 Gbps for CPRI configurations.

Q: How does a designer select between Cyclone V E, GX, and GT?

Choose E for general logic, GX for its supported lower-rate serial links, and GT when supported higher-rate transceivers are required.

Q: When should a Cyclone V SoC design migrate to Agilex 5 E-Series?

Evaluate migration when CPU, memory or acceleration requirements justify it. Rework hardware interfaces, IP, boot assets and software for the new architecture.

Q: What are the benefits of Cyclone V for industrial hardware-software co-design?

SoC variants integrate software control and programmable processing. Select the variant by actual I/O, throughput and power requirements.

FPGA
SoC FPGA

Cyclone^® V FPGAs deliver lower total power than the previous generation, efficient logic integration, integrated transceiver variants, and SoC FPGA variants with an Arm*-based hard processor system (HPS), recommended for edge-centric applications and designs.

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Explore the Cyclone^® V Family

Cyclone^® V devices are built on TSMC's 28 nm low-power (28LP) process and span six series. Three FPGA series (E, GX, GT) cover general logic through 6.144 Gbps transceiver designs, and three SoC FPGA series (SE, SX, ST) add a hard processor system with a dual-core Arm Cortex*-A9 MPCore processor. All six share the same 8-input adaptive logic module, variable-precision DSP blocks, M10K embedded memory, and hard memory controllers, so a design can move between series without re-architecting.

Cyclone V E FPGA

Optimized for low system cost and power for a wide spectrum of general logic and DSP applications.
- FPGA
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Cyclone V GX FPGA

Optimized for low cost and power for 614 Mbps to 3.125 Gbps transceiver applications.
- FPGA
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Cyclone V GT FPGA

FPGA industry’s lowest cost and power for 6.144 Gbps transceiver applications.
- FPGA
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Cyclone V SE SoC FPGA

Integrated Arm* Cortex*-A9 MPCore processor system optimized for low system cost and power for a wide spectrum of general logic and DSP applications.
- SOC FPGA
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Cyclone V SX SoC FPGA

Integrated Arm* Cortex*-A9 MPCore processor system optimized for low cost and power for 614 Mbps to 3.125 Gbps transceiver applications.
- SOC FPGA
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Cyclone V ST SoC FPGA

Integrated Arm* Cortex*-A9 MPCore processor system - FPGA industry’s low cost and power for 6.144 Gbps transceiver applications.
- SOC FPGA
Explore Cyclone V ST SoC FPGA