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Application
Holoscan Sensor Bridge
FPGAs are the data plane, pre-processing data from a variety of sensors into graphics processing unit (GPU) memory over standard Ethernet.
NVIDIA Holoscan Sensor Bridge Solutions for AI Applications
Physical AI is driving an explosion of sensors (e.g. cameras, radar, lidar, others), creating a challenge of ingesting and synchronizing massive amounts of real-time data. Altera® FPGAs implement sensor aggregation, protocol conversion, timestamping, pre-processing, and early fusion before data reaches the GPU.
The Challenges, and Why FPGA
The Challenge
Many Protocols, One Ingest Path
Cameras, radar, IMUs, and other sensors arrive on their own interface. The AI compute expects one synchronized data pipeline for accurate decisions.
Why FPGA
Many Sensors, One Aggregation Point
One FPGA ingests, fuses, and timestamps a mixed set of sensor data into a low- latency, deterministic data stream for GPU processing.
The Challenge
CPU-Mediated Capture vs. Real-Time Inference
Routing sensor traffic through the host CPU adds copies, interrupts, and scheduling variability that real-time inference cannot absorb.
Why FPGA
Ultra-Low Latency by Construction
Capture, packetization, and preprocessing run as parallel hardware pipelines, not scheduled software tasks. The FPGA path is deterministic.
The Challenge
Fixed-Function Bridges vs. Evolving Sensors
Sensor technology turns over faster than design cycles. An ASIC’s I/O protocols chosen today may not satisfy tomorrow's interfaces.
Why FPGA
Reprogrammable Interfaces, No Respin
Add or change a sensor interface through FPGA reconfiguration. The design is updated rather than a silicon respin, and no new PCB is needed.
The Challenge
Point-to-Point Cabling Limits Sensor Placement
Each sensor needs its own short, dedicated cable to the compute platform. Harnesses grow with every added sensor, and placement is dictated by interface reach rather than the application.
Why FPGA
Fewer Cables, Longer Reach
Aggregating sensors into a standardized Ethernet path replaces bundles of point-to-point cabling with standard networking media. Sensors sit where the application needs them, simplifying harnessing and layout.
Why Altera
Broadest Sensor Connectivity
Ingest MIPI, JESD204, HDMI, SDI, CAN, SPI, and more I/O interfaces, then send it to NVIDIA GPUs over one Ethernet interface.
Deterministic, Low-Latency Data Path
Agilex® FPGAs mix compute, memory, and I/O for packetization, preprocessing, and fusion, sending data to GPUs deterministically.
Edge to Data Center, One Architecture
Agilex devices offer solutions spanning 1G to 800G Ethernet, from NVIDIA Jetson to DGX-class systems on a single architecture.
Production-Ready Holoscan Designs
Best in Show winner at Embedded World North America 2026, with working Agilex 5 Holoscan Sensor Bridge reference designs.
25G Sensor Bridge Development Platform
Agilex 5 FPGA Holoscan Sensor Bridge - MIPI to 25GbE System Reference Design This design demonstrates MIPI streaming via Holoscan Sensor Bridge IP over 25G Ethernet. It combines a 4Kp60 Multi-Sensor Camera with a new Quartus® Platform Designer component for the NVIDIA Holoscan Sensor Bridge IP, using the Agilex 5 FPGA and SoC E-Series Modular Dev. Kit (Group A Device).
Reference Platforms
10G Sensor Bridge Development Platform
Agilex 5 Holoscan Sensor Bridge – MIPI to 10GbE System Reference Design
This design demonstrates MIPI streaming via Holoscan Sensor Bridge IP over 10G Ethernet. It combines a 4K Multi-Sensor Camera with the Holoscan Sensor Bridge IP, using the Agilex 5 FPGA E-Series Modular Dev Kit (ES version, Production version).
Please visit the Altera FPGA GitHub site to access the example designs:
100G Sensor Bridge Platform
Stratix® 10 Sensor Processing Kit Interface to the NVIDIA Holoscan Sensor Bridge
The Stratix 10 Sensor Processing Kit is a 100G Ethernet sensor interface platform powered by Altera’s Stratix 10 TX FPGA. It is designed to support real-time streaming of sensor data to GPU memory using NVIDIA Hololink IP and GPUDirect RDMA.
We worked closely with Altera to provide Ethernet-based Holoscan connectivity... you can select any of the Altera FPGAs depending on the application and pair them with any of the NVIDIA frameworks.
It was an honor to be selected as a Best in Show winner [at Embedded World NA Sept. 2026] … for the MitySOM-A5E Holoscan Sensor Bridge…!
Get Started
Common Questions
Holoscan Sensor Bridge is a standardized sensor-over-Ethernet architecture that streams real-time sensor data into GPU memory. On Altera FPGAs, it is implemented as a Quartus software component, allowing the FPGA to aggregate mixed sensor interfaces, packetize the data in hardware, and deliver it to an NVIDIA platform without routing through the host CPU.
MIPI, JESD204, HDMI, SDI, LVDS, CAN, and SPI, among others. Because processing of sensor data from all interfaces is implemented in FPGA logic rather than from a fixed set, one FPGA can ingest a mixed population of sensors simultaneously, even adding a new interface to a deployed design through FPGA reprogramming/reconfiguration without needing a PCB respin.
The FPGA packetizes sensor data in hardware and transports it over RoCE-based Ethernet directly into GPU memory using NVIDIA HoloLink IP and GPUDirect RDMA. Removing the host CPU from the data path eliminates the memory copies, interrupts, and scheduling variability that make software-mediated sensor ingest unpredictable for real-time inference.
Altera sensor bridge solutions span 1G to 400G Ethernet. Reference designs are available today at 10G and 25G on Agilex 5 FPGA-based boards, and at 100G+ on the Stratix 10 or Agilex 7 device-based boards.
Start with the Agilex 5 FPGA-based design examples (MIPI to 10GbE or MIPI to 25GbE) that are free to download from Altera’s GitHub site. For 100G sensor streaming, request access to the Stratix 10 Sensor Processing Kit example design or contact us for the Agilex 7 FPGA-based design example. Select the FPGA board from Altera or partners that best matches the interfaces needed for your application.