Stratix® 10 NX FPGA

Stratix® 10 NX FPGAs are AI-optimized devices designed for high-bandwidth, low-latency artificial intelligence (AI) acceleration. These FPGAs feature dedicated AI-optimized compute blocks delivering up to 143 INT8 tera operations per second (TOPS) at approximately 1 TOPS per watt. They integrate 3D-stacked High Bandwidth Memory (HBM) for in-package high-speed DRAM access and include transceivers supporting up to 57.8 Gbps PAM4 signaling for high-performance data movement.

Stratix® 10 NX FPGA Product Table

Benefits

Up to 143 INT8 TOPS or 286 INT4 TOPS1 for High Throughput AI Applications1

The Stratix® 10 NX FPGA embeds a new type of AI-optimized block called the AI Tensor Block. The AI Tensor Block is tuned for the common matrix-matrix or vector-matrix multiplications used in AI computations, with capabilities designed to work efficiently for both small and large matrix sizes. A single AI Tensor Block achieves 143 INT8 TOPS or 286 INT4 TOPS.1

High Low-Latency Memory Bandwidth for Memory Bound Solution

The integrated memory stacks allow for large, persistent AI models to be stored on-chip, which results in lower latency with large memory bandwidth to prevent memory-bound performance challenges in large models.

Scalable and Flexible I/O Connectivity Bandwidth

Stratix® 10 NX FPGA includes up to 57.8 Gbps PAM4 transceivers to implement multi-node AI inference solutions, reducing or eliminating bandwidth connectivity as a limiting factor in multi-node designs. The Stratix® 10 NX FPGA also incorporates hard IP such as PCIe 3.0 x16 and 10/25/100G Ethernet MAC/PCS/FEC. These transceivers provide a scalable connectivity solution and the flexibility to adapt to market requirements.