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100 Gbit/s IEEE 802.3bj RS Encoder/ Decoder

The Creonic IP cores are the ideal solution for throughputs beyond 10 Gbit/s for FPGA devices and throughputs of up to 100 Gbit/s on state-of-the-art ASIC technologies.

100G TCP/IP Stack for Network Acceleration - MLE FPGA IP Core Design

TCP/IP full accelerator for 100G TCP/IP connections. Including TCP, IP, MAC Layer. 128-bit wide full duplex data width pipelined all-RTL implementation for ultra-low latency. 

100G UDP IP Stack

Logic Fruit’s 100G UDP IP Stack – Optimized for high-speed 100G data transfer with minimal CPU dependency. Fully supports ARP and ICMP for reliable network connectivity and easy integration into SoC designs

100G UDP Offloading Engine (UDP100G-IP)

UDP Offloading Engine IP core is a pure hardware logic solution with no CPU involvement. The UDP100G-IP is ideal for high-performance data transmission or broadcasting over network. This IP product includes a reference design, helping reduce both development time and cost.

100G UDP/IP Stack for Network Acceleration - MLE FPGA IP Core Design

UDP/IP Full Accelerator for 100G UDP/IP connections. Including UDP, IP, MAC Layer. Pipelined all-RTL implementation for ultra-low Latency.

100GbE TCP Offloading Engine IP core (TOE100G-IP)

100GbE TCP Offloading Engine (TOE100G-IP) IP core is the epochal solution implemented without CPU. Generally, TCP processing is so complicated that expensive high-end CPU is required. TOE100G-IP built by pure hardwired logic can take place of such extra CPU for TCP protocol management.

10G UDP Offloading Engine (UDP10G-IP)

UDP Offloading Engine IP core is a pure hardware logic solution with no CPU involvement. The UDP10G-IP is ideal for high-performance data transmission or broadcasting over network. This IP product includes a reference design, helping reduce both development time and cost.

10G/100G MAC/PCS IP

The 10G/100G MAC/PCS IP Core is a fully integrated and configurable solution that combines the Ethernet Media Access Control (MAC) and Physical Coding Sublayer (PCS) functionality into a single, high-performance IP block.

10G/100G TCP/IP

The 10G/100G TCP/IP Offload Engine (TOE) IP Core is a high-performance, scalable, and fully synthesizable hardware accelerator that offloads TCP/IP protocol stack processing from the host CPU.It’s specifically designed for applications requiring high-throughput, low-latency data transmission, such as data centers, high-frequency trading (HFT), network appliances, and telecom infrastructure.