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100G UDP IP Stack

Logic Fruit’s 100G UDP IP Stack – Optimized for high-speed 100G data transfer with minimal CPU dependency. Fully supports ARP and ICMP for reliable network connectivity and easy integration into SoC designs

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10GBASE-R PHY FPGA IP

The 10GBASE-R PHY FPGA Intellectual Property (IP) core can be used with either Altera FPGA IP for 10G Ethernet MAC or with a customer-developed Ethernet MAC via a standard XGMII interface running at 156.25 Mbps.

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ARINC 429 IP Core

Logic Fruit's ARINC 429 IP Core is a multichannel module with support for virtually any number of transmitters and Receivers. Both low speed (12.5 Kbps) and high speed (100 Kbps) data rates are supported for data transmission, along with other configurable data rates from 12.5 Kbps to 1 Mbps.

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ARINC 818 IP CORE

ARINC 818 (ADVB) is a high data rate video bus based on the ANSI Fiber Channel Audio-Video (FC-AV) protocol standards. Emphasizing cost reduction as well as speeding up the link initialization. ARINC 818 is a unidirectional interface that was developed for avionics systems, such as connecting mission processors to cockpit displays like HUDS, MFDs, PFDs, or HMDs. Used widely in Boeing 787 and the KC46A tanker, Airbus A350 and A400M, the COMAC C-919, the C-17, F15, F18 and various military aircrafts.

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CXL 3 CONTROLLER IP

The CXL 3 Controller IP is forward compatible with CXL 3.x and backward compatible with previous versions, offering flexible configurations needed for advanced systems. It supports multiple channels and configurable CXL degraded modes, ensuring seamless integration with CXL devices and enabling high-performance data transfer. Ideal for versatile system designs, it accommodates all three CXL device types to facilitate efficient connectivity and scalable architecture.

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DISPLAY PORT IPs

Logic Fruit's Display Port Transmitter & Receiver IP Cores support multiple line rates up to 8.1 Gbps. The IP cores have been developed as per Display Port specifications DP2.0/eDP1.5.

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IntelliProp SATA AHCI Host Core (IPC-SA156A-HI)

IntelliProp SATA AHCI Host Core (IPC-SA156A-HI) is a highly reliable, silicon-proven Intellectual Property (IP) solution providing standard 6 Gb/s Serial-ATA (SATA 3.3) host connectivity. Optimized for Altera FPGAs, it enables rapid deployment of cost-effective, high-throughput storage solutions compliant with the widely supported AHCI register specification.

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JESD204B TRANSMITTER AND RECEIVER IP

Logic Fruit's JESD204B RTL IP supports increased lane rates up to 12.5Gbps for higher bandwidth applications. It can be configured to transmit or receive using a 8B10B link layer to achieve deterministic latency, SerDes synchronization, clock recovery and DC balance.

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JESD204C TRANSMITTER AND RECEIVER IP

Logic Fruit's JESD204C RTL IP supports increased lane rates upto 32Gbps for higher bandwidth applications. This IP can be configured to transmit or receive using either a 64B66B or 8B10B link layer with improved efficiency of payload delivery, and also provides for an improved robustness of the link with a backward-compatible option to JESD204B.

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Listing 9 out of 17 Offerings