banner

Find Offerings

Switch to Partners

By Source
Offering Types
Region
Device Family
Market Segments
Program Level
Sort by
Networking / Security
By Source
Offering Types
Region
Device Family
Market Segments
Program Level
Sort by

100G TCP/IP Stack for Network Acceleration - MLE FPGA IP Core Design

TCP/IP full accelerator for 100G TCP/IP connections. Including TCP, IP, MAC Layer. 128-bit wide full duplex data width pipelined all-RTL implementation for ultra-low latency. 

100G UDP IP Stack

Logic Fruit’s 100G UDP IP Stack – Optimized for high-speed 100G data transfer with minimal CPU dependency. Fully supports ARP and ICMP for reliable network connectivity and easy integration into SoC designs

100G UDP/IP Stack for Network Acceleration - MLE FPGA IP Core Design

UDP/IP Full Accelerator for 100G UDP/IP connections. Including UDP, IP, MAC Layer. Pipelined all-RTL implementation for ultra-low Latency.

10G Ethernet MAC IP

The 10G Ethernet MAC (Media Access Control) IP Core is a high-performance, configurable solution designed to facilitate seamless and reliable data communication over 10 Gigabit Ethernet networks

10G/100G MAC/PCS IP

The 10G/100G MAC/PCS IP Core is a fully integrated and configurable solution that combines the Ethernet Media Access Control (MAC) and Physical Coding Sublayer (PCS) functionality into a single, high-performance IP block.

10G/100G TCP/IP

The 10G/100G TCP/IP Offload Engine (TOE) IP Core is a high-performance, scalable, and fully synthesizable hardware accelerator that offloads TCP/IP protocol stack processing from the host CPU.It’s specifically designed for applications requiring high-throughput, low-latency data transmission, such as data centers, high-frequency trading (HFT), network appliances, and telecom infrastructure.

10G/25G TCP/IP Stack for Network Acceleration - MLE FPGA IP Core Design

TCP/IP Full Accelerator for 10G/25G TCP/IP connections. Including TCP, IP, MAC Layer. 128-bit wide full duplex data width pipelined all-RTL implementation for ultra-low latency. 

10G/25G UDP/IP Stack for Network Acceleration - MLE FPGA IP Core Design

UDP/IP Full Accelerator for 10G/25G UDP/IP connections. Including UDP, IP, MAC Layer. Pipelined all-RTL implementation for ultra low Latency.

10GEDEK (10Gbits/s Ethernet Data Exchange Kit) IP Core

10G Ethernet processor-less stack