Intel Simics Simulator for Altera FPGAs is a full-system simulator supporting the definition, development, and deployment of virtual platforms, enabling early product development and reducing product time-to-market.
Overview
Architecture
- Simics Simulator Core: Simics Simulator Core oversees the Simics simulator including the simulation engine. Provides simulation services through the Simics API.
- Target System: Also known as the virtual platform is a model of the hardware components, such as memories and flash devices, port devices, being simulated. This is the model of the virtual platform that simulates the real hardware specification over which the real target software can be executed.
- Target Software: Running on top of the target hardware and is an element needed to execute the simulation. This is the software that wants to be exercised during the simulation.
- User Interface: Includes components that allow the user to interact with the simulator. This interaction can be done using a graphical user interface (GUI) from which you can control the execution of the simulation and perform any debug activity.
- Simulator Infrastructure: It is integrated by components that include a Python interpreter, RiscFree IDE, Service node, etc. Simulator infrastructure consists of a large set of features that Simics simulator makes available to the users providing an aggregated value to the tool.
Contents and Features
HPS
A model of the Agilex™ 5 SoC FPGA E-Series HPS, including all the sub-systems that integrate this.
HPS Sub-system
This corresponds to the model of the sub-system that includes all the components directly associated with the HPS in the E-Series device.
FPGA Fabric Design
This corresponds to the model of the logic that is implemented in the FPGA fabric. This is not implemented as a single component, but instead, each one of the modules included in this model is instantiated individually.
qsys_top
This corresponds to the view of the design being modeled and corresponds to the system seen from the Platform Designer under the GHRD (soc_inst). Under this component are instantiated components such as the HPS sub-system and the FPGA Fabric design.
FPGA
A model that represents the top-level view of the hardware design from the FPGA device perspective, corresponding to the GHRD in the Quartus® Prime project for the E-Series device. This model instantiates the qsys_top component.
Board
A model of a board that contains an E-Series device. This model integrates the FPGA model with board components such as flash devices (SD Card, QSPI, NAND), USB disks, Ethernet PHY, and connectors.
System
A model that represents the complete system. This instantiates the board component and any other component not included in the board component.
Target Script
The virtual platform includes a wrapper called a target script, in which the system component is instantiated. In this script, the values of user-configurable parameters are defined. Also, any initial simulation setup and any automation tasks are performe
Documents
Documents
Get Started with Simics Simulator
Download, install, and run Simics simulator and Altera Agilex 5 Virtual Platform.