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Video and Image Processing
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1G-100G Robo/TSN Industrial Network Virtualization and Acceleration for Converged OT/IT - MLE FPGA Design Services

Openness has greatly benefited other industries like automotive, aerospace, banking, datacenters, and finally OT: No vendor lock-in, higher flexibility and better long-term-availability. Cost reduction for Overall Equipment Effectiveness (OEE). Meets today’s cyber security requirements. Opens-up use of AI.

3D LUT Altera® FPGA IP

The 3D Look-Up Table (LUT) Altera® FPGA IP, part of the Video and Vision Processing (VVP) Suite, delivers a high-performance, resource-efficient solution for video color space conversion, dynamic range adjustment, chroma keying, and artistic effect generation, enabling superior image quality in broadcast and professional video applications.

AVB MILAN IP

Complete Certified MILAN IP in an SoC-FPGA.

Baseline JPEG Video Decoder IP Core

This compact, extremely efficient and low latency IP core is capable of decoding in real-time video on-the-fly using standard and ubiquitous JPEG compression, even on low-cost FPGAs. This IP does not require any processor nor any external memory.

Baseline JPEG Video Encoder IP Core

Very compact and very low latency JPEG/MPEG encoder ideal for video and still pictures. Output is fully standard and decoded by all viewers.

BxBChan Channelizer

An efficient implementation of a Polyphase Filter Bank channelizer.

BxBFFT Fast Fourier Transform

An extraordinarily Fast, Efficient, and Feature-Packed FFT implementation.

DISPLAY PORT IPs

Logic Fruit's Display Port Transmitter & Receiver IP Cores support multiple line rates up to 8.1 Gbps. The IP cores have been developed as per Display Port specifications DP2.0/eDP1.5.

H.264 Baseline, Main and High Profiles Single- and Multi-channel Encoder IP Core

The H264-HP-E core from Alma Technologies is an advanced and self-contained ITU-T H.264 High profiles hardware encoder.