FPGA, CPLD, and ASIC solutions from Altera
  • Download Center
  • Literature
Sign in/register
myAltera Account
Welcome
  •   myAltera
  •   Logout
  • Products
    • Devices
    • Design Software
    • Intellectual Property
    • Development Kits/Cables
    • Design & Support Services
    • Literature
  • End Markets
    • Automotive
    • Broadcast
    • Computer & Storage
    • Consumer
    • Industrial
    • Medical
    • Military
    • Test & Measurement
    • Wireless
    • Wireline
  • Technology
    • DSP
    • External Memory
    • Embedded Processing
    • Transceivers
    • Parallel I/O
    • Signal Integrity
    • System Integration
  • Training
    • Training Courses
    • University Program
    • Webcasts & Videos
    • Demonstrations
    • Events Calendar
  • Support
    • Design & Support Resources
    • Knowledge Database
    • Devices
    • Design Software
    • Intellectual Property
    • Development Kits/Cables
    • Design Examples
    • Downloads
    • User Communities/Forums
    • mySupport
  • About Altera
    • About Us
    • Environmental
    • Customer Successes
    • Partners
    • Newsroom
    • Investor Relations
    • Jobs
    • Contact Us
  • Buy Online
    • Devices
    • Design Software
    • Development & Education Kits
    • Cables & Programming Hardware
    • Intellectual Property
  • Entire Site
  • Part Number
  • Knowledge Database
  • Support & Technical Docs
  • Forums & Wiki
Username:  
Password:  
 
Forgot my username or password
Don't have myAltera account? Register Now.
Enter your email address:

IP and Megafunctions

Home > Products > Literature > IP and Megafunctions
Download the latest version of Adobe Acrobat Reader
Intellectual Property (IP): Megafunctions
Title Doc Version Release Date File Size Document Part Number
User Guides
Subscribe Alert ALTDLL and ALTDQ_DQS Megafunctions User Guide
     ALTDLL_ALTDQ_DQS_DesignExample_ex1 (796 KB)
     ALTDLL_ALTDQ_DQS_ex1_msim (397 KB)
2.0Dec 20085 MBUG-01032-2.0
Subscribe Alert PCI Express Compiler User Guide Updated 9.1 SP1Feb 20104 MBUG-PCI10605-2.6
Subscribe Alert QDR II and QDR II+ SRAM Controller with UniPHY User Guide Updated 1.1Jan 2010743 KBEMI_QDRII_UG-1.1
Subscribe Alert RLDRAM II Controller with UniPHY IP User Guide Updated 1.1Jan 2010743 KBEMI_RLDRAM_UG-1.1
Subscribe Alert SCFIFO and DCFIFO Megafunctions User Guide Updated
     DCFIFO Design Example (33 KB)
6.1Jan 2010395 KBUG-MFNALT_FIFO-6.1
Subscribe Alert External Memory PHY Interface (ALTMEMPHY) (nonAFI) Megafunction User Guide Updated 7.3Jan 20103 MBUG-01014-7.3
Subscribe Alert FIR Compiler II MegaCore Function User Guide New 1.0Jan 20102 MBUG-01072-1.0
Subscribe Alert Thermal Sensor (ALTTEMP_SENSE) Megafunction User Guide New
     alttemp_sense_ex1.zip (11 KB)
2.0Feb 2010223 KBUG-01074-2.0
Subscribe Alert Avalon Verification IP Suite User Guide
(Includes Avalon-MM and Avalon-ST tutorials)
     Avalon Verification IP Suite Design Files (21 KB)
1.1Dec 20092 MBUG-01073-1.1
Subscribe Alert DDR and DDR2 SDRAM High-Performance Controllers and ALTMEMPHY IP User Gui1.1Nov 20093 MBEMI_DDR_UG-1.1
Subscribe Alert DDR3 SDRAM High-Performance Controller and ALTMEMPHY IP User Guide1.1Nov 20092 MBEMI_DDR3_UG-1.1
Subscribe Alert Integer Arithmetic Megafunctions User Guide
     altaccumulate_DesignExample.zip (90 KB)
     altecc_DesignExample1.zip (79 KB)
     altecc_DesignExample2.zip (115 KB)
     altmemmult_DesignExample.zip (186 KB)
     altmult_accum_DesignExample.zip (105 KB)
     altmult_add_DesignExample.zip (77 KB)
     altmult_complex_DesignExample.zip (156 KB)
     altsqrt_DesignExample.zip (198 KB)
     parallel_adder_DesignExample.zip (97 KB)
1.0Nov 20092 MBUG-01063-1.0
Subscribe Alert Megafunction Overview User Guide1.0Feb 2009329 KBUG-01056-1.0
Subscribe Alert Phase-Locked Loops Reconfiguration Megafunction User Guide (ALTPLL_RECONFIG)
     altpll_reconfig_DesignExample1_ex1.zip (167 KB)
     altpll_reconfig_DesignExample_ex2.zip (189 KB)
     altpll_reconfig_DesignExample_ex3.zip (316 KB)
     altpll_reconfig_ex1_msim.zip (68 KB)
     altpll_reconfig_ex2_msim.zip (68 KB)
     altpll_reconfig_ex3_msim.zip (432 KB)
4.0Jul 20087 MBUG-032405-4.0
Subscribe Alert RAM Initializer Megafunction User Guide (ALTMEM_INIT)
     DE1_internalROM.zip (8 KB)
     DE2_externalROM.zip (10 KB)
1.0May 2008524 KBUG-01034-1.0
Subscribe Alert SDI MegaCore Function User Guide9.1Nov 20092 MBUG-SDI1005-11.0
Subscribe Alert Shift Register (RAM-Based) Megafunction User Guide (ALTSHIFT_TAPS)
     DE_altshift_taps.zip (5 KB)
2.0Jul 2008438 KBUG-01009-2.0
Subscribe Alert 8B10B Encoder/Decoder MegaCore Function User Guide9.1Nov 2009449 KBUG-IPED8B10B-1.3
Subscribe Alert Active Serial Memory Interface Megafunction User Guide (ALTASMI_PARALLEL)3.0Sep 2009395 KBUG-ALT1005-3.0
Subscribe Alert ALTDQ and ALTDQS Megafunction User Guides
     altdq_dqs_DesignExample.zip (67 KB)
     altdq_dqs_msim.zip (11 KB)
3.1Nov 2009642 KBUG-MF9304-3.1
Subscribe Alert ALTLVDS Megafunction User Guide
     altlvds_DesignExample.zip (203 KB)
     altlvds_DesignExample_ex2.zip (113 KB)
     altlvds_DesignExample_ex3.zip (252 KB)
     altlvds_DesignExample_ex4.zip (31 KB)
     altlvds_DesignExample_ex5.zip (12 KB)
     altlvds_ex1_msim.zip (92 KB)
     altlvds_ex2_msim.zip (58 KB)
     altlvds_ex3_msim.zip (104 KB)
     altlvds_ex4_msim.zip (433 KB)
6.1Nov 2009966 KBUG-MF9504-6.1
Subscribe Alert ASI MegaCore Function User Guide9.1Nov 2009363 KBUG-ASI0106-9.0
Subscribe Alert CIC MegaCore Function User Guide9.1Nov 2009780 KBUG-CIC-8.0
Subscribe Alert Clock Control Block Megafunction User Guide (ALTCLKCTRL)
     altclkctrl Design Example (104 KB)
     altclkctrl Design Example ModelSim (5 KB)
2.4Apr 2007337 KBUG-MF9604-2.4
Subscribe Alert CRC Compiler User Guide9.1Nov 2009555 KBUG-CRC01004-1.7
Subscribe Alert DDR and DDR2 SDRAM Controller Compiler User Guide9.0Mar 20092 MBUG-DDRSDRAM-9.0
Subscribe Alert Double Data Rate I/O Megafunction User Guide (ALTDDIO_IN, ALTDDIO_OUT, and ALTDDIO_BIDIR)
     altddio_DesignExample_ex1.zip (112 KB)
     altddio_DesignExample_ex2.zip (140 KB)
     altddio_ex1_msim.zip (18 KB)
     altddio_ex2_msim.zip (17 KB)
4.2Jun 20074 MBUG-DDRMGAFCTN-4.2
Subscribe Alert Dynamic Calibrated On-Chip Termination Megafunction User Guide (ALTOCT)
     alt_oct_msim.zip (30 KB)
     altoct_DesignExample.zip (30 KB)
2.0Dec 2006268 KBUG-01003-2.0
Subscribe Alert FFT MegaCore Function User Guide9.1Nov 20091 MBUG-FFT-9.1
Subscribe Alert FIR Compiler User Guide9.1Nov 20092 MBUG-FIRCOMPILER-9.1
Subscribe Alert First-In-First-Out Partitioner Megafunction User Guide (FIFO Partitioner)1.2Aug 2005306 KBUG-IPFIFO-1.2
Subscribe Alert Flash Memory Megafunction User Guide
     alt_ufm Archive Files (72 KB)
     alt_ufm ModelSim Files (16 KB)
2.0Jul 20061 MBUG-040105-2.0
Subscribe Alert Floating-Point Megafunctions User Guide
     Design Examples and ModelSim Files (36 MB)
2.0Nov 20092 MBUG-01058-2.0
Subscribe Alert HyperTransport MegaCore Function User Guide9.1Nov 2009738 KBUG-MCHYPRTRNS-1.12
Subscribe Alert I/O Buffer Megafunction (ALTIOBUF) User Guide
     altiobuf_design_example_1.zip (56 KB)
     altiobuf_ex1_msim.zip (91 KB)
2.0Dec 20081 MBUG-01024-2.0
Subscribe Alert Internal Memory (RAM and ROM) User Guide
     Internal_Memory_DesignExample.zip (33 KB)
1.0Nov 2009884 KBUG-01068-1.0
Subscribe Alert NCO MegaCore Function User Guide9.1Nov 2009968 KBUG-NCOCOMPILER-9.1
Subscribe Alert One-Time Programmable (ALTOTP) Megafunction User Guide
     DesignExample_otpfuse.zip (22 KB)
1.0Nov 2009243 KBUG-01059-1.0
Subscribe Alert PCI Compiler User Guide9.1Nov 20092 MBUG-PCICOMPILER-4.9
Subscribe Alert Phase-Locked Loop Megafunction User Guide (ALTPLL)
     ddr_clk.zip (98 KB)
     ddr-clk-msim.zip (6 KB)
     shift_clk.zip (387 KB)
     shift_clk_msim.zip (10 KB)
8.0Nov 2009806 KBUG-ALTPLL-8.0
Subscribe Alert POS-PHY Level 2 and 3 Compiler User Guide9.1Nov 20091,011 KBUG-POSPHY2_3-9.1
Subscribe Alert POS-PHY Level 4 MegaCore Function User Guide9.1Nov 20092 MBUG-IPPOSPHY4-9.1
Subscribe Alert QDRII SRAM Controller MegaCore Function User Guide9.1Nov 2009906 KBUG-IPQDRII-8.1
Subscribe Alert RapidIO MegaCore Function User Guide9.1Nov 20092 MBUG-MC_RIOPHY-2.11
Subscribe Alert Reed-Solomon Compiler User Guide9.1Nov 2009642 KBUG-RSCOMPILER-9.1
Subscribe Alert Remote Update Circuitry Megafunction User Guide (ALTREMOTE_UPDATE)
     altremote_update Design Example 1 (16 KB)
     altremote_update Design Example 2 (16 KB)
     altremote_update ModelSim Design Example 1 (12 KB)
     altremote_update ModelSim Design Example 2 (12 KB)
2.4Apr 2009928 KBUG-031005 -2.4
Subscribe Alert RLDRAM II Controller MegaCore Function User Guide9.1Nov 2009831 KBUG-RLDRAM-8.1
Subscribe Alert SerialLite II MegaCore Function User Guide9.1Nov 20092 MBUG-0705-1.10
Seriallite MegaCore Function User Guide1.0.0Sep 2004942 KBUG-SERIALLT-1.0
Subscribe Alert Shift Register Megafunction User Guide (LPM_SHIFTREG)
     lpm_shiftreg Design Files Archive Example 1 (84 KB)
     lpm_shiftreg Design Files Example 1 (80 KB)
     lpm_shiftreg Design Files Archive Example 2 (75 KB)
     lpm_shiftreg Design Files Example 2 (70 KB)
     lpm_shiftreg ModelSim Files Example 1 (5 KB)
     lpm_shiftreg ModelSim Files Example 2 (4 KB)
3.0Jan 2007939 KBUG-033105-2.1
Stratix GX Transceiver User Guide3.0Jan 20058 MBUG-STXGX-3.0
Stratix II GX Embedded Gigabit Ethernet MAC/PHY User's Guide1,0Nov 2005430 KB 
Stratix II GX Embedded Gigabit Ethernet MAC/PHY User's Guide1.0Nov 2005462 KB 
Subscribe Alert Triple Speed Ethernet MegaCore Function User Guide9.1Nov 20092 MBUG-01008-1.8
Subscribe Alert UTOPIA Level 2 Master MegaCore Function User Guide9.1Nov 2009805 KBUG-UTOPIA_MASTER-9.1
Subscribe Alert UTOPIA Level 2 Slave MegaCore Function User Guide9.1Nov 2009659 KBUG-UTOPIA_SLAVE-9.1
Video and Image Processing Suite User Guide9.1Nov 20096 MBUG-VIPSUITE-9.1
Subscribe Alert Virtual JTAG (sld_virtual_jtag) Megafunction User Guide
     sld_virtual_jtag - Design Example 1 (140 KB)
     sld_virtual_jtag - Design Example 2 (304 KB)
2.0Dec 20081 MBUG-SLDVRTL-2.0
Subscribe Alert Viterbi Compiler User Guide9.1Nov 2009991 KBUG-VITERBI-9.1
Application Notes
AN 513: RapidIO Interoperability With TI 6482 DSP Reference Design2.0Nov 2008867 KBAN-513-2.0
AN 398: Using DDR/DDR2 SDRAM With SOPC Builder1.1Aug 2006775 KBAN-398-1.1
AN 392: Implementing Multiple Legacy DDR/DDR2 SDRAM Controller Interfaces
     three controller example (26 KB)
     two controller example (15 KB)
2.0Jul 2007306 KBAN-392-2.0
AN 380: Test DDR or DDR2 SDRAM Interfaces on Hardware Using the Example Driver1.2Jun 2006630 KBAN-380-1.2
AN 361: Interfacing DDR & DDR2 SDRAM With Cyclone II Devices1.3Jun 2006380 KBAN-361-1.3
AN 360: Updating Simulation Models for the POS-PHY Level 4 MegaCore Function1.1Dec 200463 KBAN-360-1.1
AN 359: POS-PHY Level 4 MegaCore Function Parameter Selection Calculator
     Parameter Selection Calculator (2 MB)
2.0Sep 2008238 KBAN-359-2.0
AN 349: QDR SRAM Controller Reference Design for Stratix & Stratix GX Devices1.0May 2004280 KBAN-349-1.0
AN 348: Interfacing DDR SDRAM with Cyclone Devices1.1Jul 2004441 KBAN-348-1.1
AN 343: OpenCore Evaluation of AMPP Megafunctions1.0Feb 2004294 KBAN-343-1.0
AN 335: POS-PHY Level 4 MegaCore Function v2.1.0 Wrapper Features1.0Jan 2004282 KBAN-335-1.0
AN 320: OpenCore Plus Evaluation of Megafunctions1.6Nov 2007307 KBAN-320-1.6
White Papers
Subscribe Alert High-Definition Video Deinterlacing Using FPGAs1.0Oct 20091 MBWP-01117-1.0
Errata Sheets
Subscribe Alert MegaCore IP Library Release Notes and Errata Updated
(All IP and Nios II errata and release notes are combined into one document beginning with version 7.2)
9.1.1Dec 2009954 KBRN-IP-5.1

PDF Legal Notice

Rate This Page


  • Overview
    • Brochures
    • Conference Papers
    • Design Contest Papers
    • Device Selector Guides
    • Solution Sheets
    • White Papers
  • By End Market
    • Automotive
    • Broadcast
    • Consumer
    • Medical
    • Military
  • Device Documentation
    • Stratix IV (E, GX, GT)
    • Stratix III (L and E)
    • Stratix II GX
    • Stratix II
    • Stratix GX
    • Stratix
    • Arria II GX
    • Arria GX
    • Cyclone IV (E and GX)
    • Cyclone III (and LS)
    • Cyclone II
    • Cyclone
    • MAX II (and G, Z)
    • MAX 3000A
    • MAX 7000
    • HardCopy IV (E and GX)
    • HardCopy III
    • HardCopy II
    • Automotive-Grade Devices
    • Configuration Devices
    • Mature Devices
    • Packaging
  • Design Tools
    • Quartus II
    • SOPC Builder
    • System-Level Software
    • MAX+PLUS II
  • IP/Embedded Processors
    • IP and Megafunctions
      • Embedded Processors
      • Interfaces and Peripherals
      • DSP
      • Communications
    • Nios II Processor
    • Nios Processor
  • By Technology
    • DSP Handbook
    • External Memory Interfaces
  • Development Kits/Cables
    • Development Kits
    • Programming Cables
  • By Type
    • Advisories/PCNs/PDNs
    • Application Briefs
    • Application Notes
    • Brochures
    • Conference Papers
    • Data Sheets
    • Design Content Papers
    • Device Selector Guides
    • Errata Sheets
    • Functional Specifications
    • Manuals
    • Pin Connection Guidelines
    • Pin-Outs
    • Release Notes
    • Reliability Report
    • Solution Sheets
    • Technical Briefs
    • Tutorials
    • User Guides
    • White Papers
  • Technical Updates
    • View Recent Technical Updates
    • Subscribe/Manage
    Please give us feedback
    Products | End Markets | Technology | Training | Support | About Altera | Buy Online
    Jobs | Investor Relations | Contact Us | Site Map | Privacy | Legal Notice
    Copyright © 1995-2010 Altera Corporation. All Rights Reserved.
    Altera Forum
    Altera
    Forum
    Twitter
    Twitter
    RSS
    RSS
    Facebook
    Facebook
    Flickr
    Flickr
    YouTube
    YouTube
    Email Updates
    Email
    Updates