Super Speed AES 256 IP (AES256SS IP) Overview Key Features Offering Brief What's Included Ordering Information Documentation & Resources Markets DesignGateway Co., Ltd. Select AES-256SS IP specializes in ultra-high throughput and ultra-low latency. IP computes 128-bit data blocks in every 1 clock cycle. Delivering 128Mbps throughput per 1MHz such as 51.2 Gbps @ 400MHz. View Partner Website Partner Product Page Contact Now Contact DesignGateway Co., Ltd. X ProfessionCIO (Chief Information Officer)CISO (Chief Information Security Officer)COO (Chief Operating Officer)CTO (Chief Technology Officer)ConsultantData SciencesEducatorFPGA EngineeringFacilities/Audio VideoFinance/ProcurementHardware Development/EngineeringHobbyist/MakerIT Generalist/Other ITIT Information SecurityIT ManagementIT StorageIT User Devices - PCs tablets etcInfrastructure/Datacenter ArchitectureLine of Business or Service HeadMarketingNetwork Architecture/EngineeringOperations EngineerOtherOwner/Executive ManagementPress AnalystSalesScientist/ResearcherSoftware/Application Development/EngineeringSolution/System ArchitectureStudent Country/Region CodeAfghanistanAland IslandsAlbaniaAlgeriaAmerican SamoaAndorraAngolaAnguillaAntarcticaAntigua/BarbudaArgentinaArmeniaArubaAustraliaAustriaAzerbaijanBahamasBahrainBangladeshBarbadosBelarusBelgiumBelizeBeninBermudaBhutanBoliviaBonaireBosnia-Herz.BotswanaBouvet IslandsBrazilBrit.Ind.Oc.TerBrit.Virgin Is.BruneiBulgariaBurkina FasoBurundiC Africa RpblicCambodiaCameroonCanadaCape VerdeCayman IslandsChadChileChinaChristmas IslndCocos IslandsColombiaComorosCongoCooks IslandsCosta RicaCote d'IvoireCroatiaCubaCuracaoCyprusCzechiaDem. Rep. CongoDenmarkDjiboutiDominicaDominican RepublicEcuadorEgyptEl SalvadorEquatorial GuineaEritreaEstoniaEswatiniEthiopiaFalkland IslndsFaroe IslandsFijiFinlandFranceFrench GuianaFrench Poly.French S. Terr.GabonGambiaGeorgiaGermanyGhanaGibraltarGreeceGreenlandGrenadaGuadeloupeGuamGuatemalaGuernseyGuineaGuinea-BissauGuyanaHaitiHeard/McDon.IslHondurasHong KongHungaryIcelandIndiaIndonesiaIranIraqIrelandIsle of ManIsraelItalyJamaicaJapanJerseyJordanKazakhstanKenyaKiribatiKuwaitKyrgyzstanLaosLatviaLebanonLesothoLiberiaLibyaLiechtensteinLithuaniaLuxembourgMacao SAR ChinaMacedoniaMadagascarMalawiMalaysiaMaldivesMaliMaltaMarshall IslndsMartiniqueMauritaniaMauritiusMayotteMexicoMicronesiaMinor Outl.Isl.MoldovaMonacoMongoliaMontenegroMontserratMoroccoMozambiqueMyanmarN.Mariana IslndNamibiaNauruNepalNetherlandsNew CaledoniaNew ZealandNicaraguaNigerNigeriaNiueNorfolk IslandsNorth KoreaNorwayOmanPakistanPalauPalestine, StatePanamaPap. New GuineaParaguayPeruPhilippinesPitcairnPolandPortugalPuerto RicoQatarReunionRomaniaRussian FedRwandaS. Sandwich InsS.TomePrincipeSaint HelenaSaint LuciaSaint MartinSaint PierreSamoaSan MarinoSaudi ArabiaSenegalSerbiaSeychellesSierra LeoneSingaporeSint MaartenSlovakiaSloveniaSolomon IslandsSomaliaSouth AfricaSouth KoreaSouth SudanSpainSri LankaSt Kitts&NevisSt. BarthelemySt. VincentSudanSurinameSvalbard & JMSwedenSwitzerlandSyriaTaiwanTajikistanTanzaniaThailandTimor-LesteTogoTokelauTongaTrinidadTobagoTunisiaTurkeyTurkmenistanTurksh CaicosinTuvaluUgandaUkraineUnited KingdomUnited StatesUruguayUtd.Arab Emir.UzbekistanVanuatuVatican CityVenezuelaVietnamVirgin IslandsWallis & FutunaWestern SaharaYemenZambiaZimbabwe By submitting this inquiry form, you acknowledge that your contact information will be sent to Altera or the Altera Solutions Acceleration for follow-up. Opt-in to Marketing Communications from Altera. LeadSource - None -Market Place ASAP Account ID Record Type Name Key Features Support AES ECB mode standard. Support 256-bit key size. Support input data width 128-bit. Throughput rate at 128Mbits/MHz. Speed up to 51.2 Gbps @400MHz. Operate 128-bit data every clock cycle. Offering Brief Offering Brief Device Family Arria® 10 SX SoC FPGA, Agilex® 7 FPGAs and SoC FPGAs F-Series Offering Status Production Integrated Testbench No Evaluation License No Design Examples Available Yes Demo Yes Compliance No Latest Quartus Version Supported 23.1.0 Development Language Encrypted VHDL What’s Included? Encrypted IP core Reference Designs Quartus Project Ordering Information NET-AES256SS-IP from Direct NET-AES256SS-IP from Macnica Documentation & Resources Datasheet Reference Design Document AES-IP core series Design Guide Demo Instruction Market Segment and Sub-Segments Aerospace View Sub-Segments Aerospace Aerospace Back to Market Consumer View Sub-Segments Consumer Home Audio/Video Back to Market Defense View Sub-Segments Defense MIL COMMS Radar/Ew Back to Market Government View Sub-Segments Government Govt Infrastructure Back to Market Medical View Sub-Segments Medical Imaging Lab/Life Sciences Non-Imaging Patient Devices Other Medical Ultrasound Video Back to Market Image Test View Sub-Segments Test Communication Tester Other Test Back to Market Transportation View Sub-Segments Transportation Automotive (Passenger Vehicles) Non-Automotive Transportation Transportation Infrastructure (non-charging) Back to Market Offering Types and Sub-Types Intellectual Property (IP) Interfaces Networking / Security