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SD / SDIO Host Controller 3.0

iWave Global

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iWave's SD/SDIO Host Controller 3.0 is a high-performance IP core designed to facilitate seamless communication between embedded systems and SD/SDIO devices. Fully compliant with SD Host Controller Specification Version 3.0 and SD Physical Layer Specification Version 3.0, this controller supports a wide range of SD card types, including SD, MicroSD, SDHC, SDXC, and SDIO devices. It offers flexible data transfer options with support for both single-block and multi-block data transfers, utilizing a 2KB data buffer for efficient read and write operations. The controller operates across various UHS-I modes, including SDR12, SDR25, DDR50, SDR50, and SDR104, ensuring compatibility with high-speed SD cards.​

Designed for integration with FPGA-based systems, the IP core provides a 32-bit AXI4 memory-mapped interface towards the host processor and a 32-bit AXI4-Lite interface towards the SD host controller. It includes essential features such as cyclic redun...

iWave's SD/SDIO Host Controller 3.0 is a high-performance IP core designed to facilitate seamless communication between embedded systems and SD/SDIO devices. Fully compliant with SD Host Controller Specification Version 3.0 and SD Physical Layer Specification Version 3.0, this controller supports a wide range of SD card types, including SD, MicroSD, SDHC, SDXC, and SDIO devices. It offers flexible data transfer options with support for both single-block and multi-block data transfers, utilizing a 2KB data buffer for efficient read and write operations. The controller operates across various UHS-I modes, including SDR12, SDR25, DDR50, SDR50, and SDR104, ensuring compatibility with high-speed SD cards.​

Designed for integration with FPGA-based systems, the IP core provides a 32-bit AXI4 memory-mapped interface towards the host processor and a 32-bit AXI4-Lite interface towards the SD host controller. It includes essential features such as cyclic redundancy check (CRC) for command and data integrity, timeout monitoring for response, data, CRC token, and busy signals, and supports SD card detection and write protection input pins. The controller's architecture leverages power management techniques, making it suitable for low-power applications in industrial, medical, automotive, and consumer electronics sectors.

Key Features

  • Compliant with SD Host Controller Standard Specification Version 3.0
  • Compliant with SD Physical Layer Specification Version 3.0
  • Supports 1-bit, 4-bit SD modes
  • Supports SD Card Detection input pin
  • Supports SD Card Write Protection input pin
  • Supports programmable clock frequency generation to the SD card
  • Supports Interrupt and ADMA2 transfer mode of operation
  • Individual 2Kbyte data buffer for read and write
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Offering Brief

Offering Brief

Device Family Arria® 10 SX SoC FPGA, Stratix® 10 AX SoC FPGA, Stratix® 10 SX SoC FPGA
Offering Status Production
Integrated Testbench No
Evaluation License No
Design Examples Available No
Demo No
Compliance No
Hardware Platforms Supported Arria® 10 SX SoC Development Kit
Latest Quartus Version Supported 24.3.0
Development Language Verilog

IP Core

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