RTC Master (Real-Time Clock)

Overview Key Features Offering Brief What's Included Ordering Information Documentation & Resources Markets

NetTimeLogic GmbH

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NetTimeLogic’s RTC Master Clock is a full hardware (FPGA) only implementation of a synchronization core allowing to read and write a I2C Realtime Clock (RTC) like the DS1307 or MCP7941x. It allows storing and recovering time from a non-volatile storage where an additional nanosecond part is calculated to achieve maximum accuracy. Access to the RTC is done from the FPGA without software interaction, which allows running RTC synchronization completely independent and standalone from the user application.

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Key Features

Real Time Clock (RTC) Master Clock
Supports DS1307 and MCP7941x (and compatible) Real Time Clocks (RTC) and self-configuration at startup
Allows to synchronize the internal clock to the RTC and vise versa
Built-in I2C controller with configurable baud rate
Aligned writing and reading of time with the RTC PPS
Hardware time conversion from Time of Day format (hh:mm:ss dd:mm:yyyy) into seconds since midnight 1.1.1970 (Linux, TAI, PTP)

Offering Brief

Device Family	Arria® 10 SX SoC FPGA, Cyclone® IV GX FPGA, Agilex® 5 FPGAs and SoC FPGAs E-Series, MAX® 10 FPGA, Cyclone® V SX SoC FPGA, Arria® V GZ FPGA, Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series, Agilex® 7 FPGAs and SoC FPGAs I-Series, Arria® V SX SoC FPGA, Stratix® 10 DX FPGA, Stratix® 10 SX SoC FPGA, Agilex® 7 FPGAs and SoC FPGAs M-Series, Cyclone® V GT FPGA, Arria® 10 GT FPGA, Arria® V ST SoC FPGA, Arria® 10 GX FPGA, Stratix® 10 TX FPGA, Cyclone® V SE SoC FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Arria® V GX FPGA, Cyclone® V E FPGA, Agilex® 3 FPGAs and SoC FPGAs C-Series, Cyclone® V GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA, Cyclone® V ST SoC FPGA, Agilex® 5 FPGAs and SoC FPGAs D-Series, Stratix® 10 GX FPGA, Arria® V GT FPGA, Cyclone® 10 LP FPGA, Agilex® 7 FPGAs and SoC FPGAs F-Series, Cyclone® 10 GX FPGA, Cyclone® IV E FPGA, Stratix® 10 AX SoC FPGA
Offering Status	Production
Demo	No
Integrated Testbench	Yes
Evaluation License	Yes
Design Examples Available	Yes
Compliance	No
Latest Quartus Version Supported	25.1.0
OS Support	Not required
Development Language	VHDL