partner-offering-banner.png

KiviPQC-KEM - Post-Quantum Key Encapsulation IP Core (ML-KEM)

KiviCore

Member

The KiviPQC-KEM is an IP core implementing the ML-KEM (Module-Lattice-based Key Encapsulation Mechanism) a post-quantum cryptographic standard defined by NIST FIPS 203. Engineered to withstand both classical and quantum computer attacks, ML-KEM enables two parties to securely establish a shared secret key.

Designed as a standalone, self-contained module, the KiviPQC-KEM can be integrated seamlessly into any SoC design. It features a standard AMBA® AXI4-Lite interface for straightforward hardware integration and platform-independent C code, HAL, and API drivers for simple software integration into host processor.

The IP core is fully NIST FIPS 203 compliant, supports the ML-KEM parameter sets 512/768/1024, and offers KeyGen and Encaps/Decaps functions in a standalone engine with minimal attack surface. Hardware offloading accelerates all ML-KEM operations while providing reliable protection against time-based side-channel attacks.

Key Features

  • Easy integration: AMBA® AXI4-Lite Interface, Platform agnostic C-Source Code HAL, API and Software drivers included
  • Minimal logic utilization: Designed and optimized for area constrained devices
  • Self-contained engine with a minimal attack surface
  • Compliant with ML-KEM specifications in NIST FIPS PUB 203
Expand Close
Keyfeatures main image

Offering Brief

Offering Brief

Device Family Agilex® 7 FPGAs and SoC FPGAs F-Series, Agilex® 7 FPGAs and SoC FPGAs I-Series, Agilex® 7 FPGAs and SoC FPGAs M-Series, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX SoC FPGA, Cyclone® 10 GX FPGA, Stratix® 10 AX SoC FPGA, Stratix® 10 DX FPGA, Stratix® 10 GX FPGA, Stratix® 10 SX SoC FPGA, Stratix® 10 TX FPGA
Offering Status Production
Integrated Testbench Yes
Evaluation License Yes
Design Examples Available Yes
Demo No
Compliance Yes
Latest Quartus Version Supported 25.1.1
Development Language Encrypted Verilog, Verilog

System Verilog RTL Source Code or Netlist format

Testbenches

Integration examples

Software HAL & driver source code

Software example

Documentation: FPGA integration guide, Software user guide, Demo Examples

Ordering Information

Market Segment and Sub-Segments