RunX Low-Latency H.264 Video Encoder IP Core

Overview Key Features Offering Brief What's Included Ordering Information Markets

The RunX H.264 Video Encoder IP Core is a high-performance, low-latency video compression solution designed for both FPGA- and ASIC-based systems. It supports real-time video encoding for mission-critical applications requiring deterministic latency, low power consumption, and hardware-level optimization.

The IP supports resolutions from 720p to 4K, achieving extremely low bitrates while maintaining excellent visual quality and ultra-low end-to-end latency. Its architecture is fully RTL-based, synthesizable, and technology-agnostic, making it suitable for: - FPGA deployment (All Altera families) - ASIC prototyping - Full custom ASIC tape-out projects

The design supports fixed-point processing, streaming pipelines, and configurable buffering. Memory usage can be tailored to system constraints, supporting: - Internal memory (FPGA BRAM / ASIC SRAM) - External memory (DDR / SDRAM)

RunX also provides architectural support for FPGA-to-ASIC migratio...

RunX also provides architectural support for FPGA-to-ASIC migration, including RTL cleanup, clocking strategy alignment, and memory architecture optimization.

The IP is delivered without HDL source code. Instead, it is provided as a synthesizable, implementation-ready netlist (e.g. encrypted netlist / gate-level netlist, depending on target platform and agreement), ensuring strong IP protection while enabling seamless system integration.

In addition to the H.264 compression core, Ethernet-based video streaming support can be provided, including RTSP-compatible packetization and transport logic, enabling direct integration with IP networks for live video streaming.

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Key Features

Ultra-low latency H.264 video compression
FPGA and ASIC compatible architecture
Optional Ethernet + RTSP streaming support
Deterministic throughput and latency
Optimized for aerospace, defense, UAV, and space payloads

Offering Brief

Device Family	Cyclone® V E FPGA, Cyclone® V GT FPGA, Cyclone® V GX FPGA, Cyclone® V SE SoC FPGA, Cyclone® V ST SoC FPGA, Cyclone® V SX SoC FPGA, Agilex® 3 FPGAs and SoC FPGAs C-Series, Agilex® 5 FPGAs and SoC FPGAs D-Series, Agilex® 5 FPGAs and SoC FPGAs E-Series, Agilex® 7 FPGAs and SoC FPGAs F-Series, Agilex® 7 FPGAs and SoC FPGAs I-Series, Agilex® 7 FPGAs and SoC FPGAs M-Series, Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX SoC FPGA, Cyclone® 10 GX FPGA, Cyclone® 10 LP FPGA, Stratix® 10 AX SoC FPGA, Stratix® 10 DX FPGA, Stratix® 10 GX FPGA, Stratix® 10 SX SoC FPGA, Stratix® 10 TX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA
Offering Status	Development
Integrated Testbench	Yes
Evaluation License	Yes
Design Examples Available	Yes
Demo	No
Compliance	No
Latest Quartus Version Supported	25.1.1
OS Support	Ubuntu, Windows
Development Language	Encrypted VHDL