This 5-days course designed for ASIC & FPGA verification engineers that would like to use
the SystemVerilog and UVM to verify digital designs.
SystemVerilog is a significant new enhancement to Verilog and includes major extensions
into abstract design, test-bench, formal, and C-based APIs.
SystemVerilog also defines new layers in the Verilog simulation strata. These extensions
provide significant new capabilities to the designer, verification engineer and architect,
allowing better teamwork and co-ordination between different project members.
This course provides all necessary theoretical and practical know-how to write test-benches
using SystemVerilog standard language.
The course goes into great depth, and touches upon every aspect of the standard with
directly connected to the topics needed in the industry today.
The course combines 50% theory with 50% practical work in every meeting.
The practical labs cover all the theory and also include practical te...
This 5-days course designed for ASIC & FPGA verification engineers that would like to use
the SystemVerilog and UVM to verify digital designs.
SystemVerilog is a significant new enhancement to Verilog and includes major extensions
into abstract design, test-bench, formal, and C-based APIs.
SystemVerilog also defines new layers in the Verilog simulation strata. These extensions
provide significant new capabilities to the designer, verification engineer and architect,
allowing better teamwork and co-ordination between different project members.
This course provides all necessary theoretical and practical know-how to write test-benches
using SystemVerilog standard language.
The course goes into great depth, and touches upon every aspect of the standard with
directly connected to the topics needed in the industry today.
The course combines 50% theory with 50% practical work in every meeting.
The practical labs cover all the theory and also include practical test-bench design.
The course also teaches how to write test-bench programs and employ a simulation and
tools, how to build coverage-driven test-bench, use of object-oriented programming
methods, use of classes, functional coverage and randomization techniques.