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10GEDEK (10Gbits/s Ethernet Data Exchange Kit) IP Core

10GEDEK is ALSE's 10G Ethernet version of the popular GEDEK IP, including a very optimized MAC, and implements UDP, ICMP, and ARP, thus being suitable for all network configurations. It is available on all Altera FPGAs that have 10G capable transceivers including Cyclone10GX.

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Key Features

  • Processor-less 10G Ethernet stack
  • 100% efficiency (back-to-back frames Rx+T at 10G, no loss)
  • Memory map over Ethernet
  • Works through Eth infrastructure (arp)
  • Software API provided
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Offering Brief

Offering Brief

Device Family Arria® 10 SX SoC FPGA, Agilex® 5 FPGAs and SoC FPGAs E-Series, Cyclone® V SX SoC FPGA, Arria® V GZ FPGA, Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series, Agilex® 7 FPGAs and SoC FPGAs I-Series, Arria® V SX SoC FPGA, Stratix® 10 DX FPGA, Stratix® 10 SX SoC FPGA, Agilex® 7 FPGAs and SoC FPGAs M-Series, Cyclone® V GT FPGA, Arria® 10 GT FPGA, Arria® V ST SoC FPGA, Arria® 10 GX FPGA, Stratix® 10 TX FPGA, Cyclone® V SE SoC FPGA, Arria® V GX FPGA, Cyclone® V E FPGA, Agilex® 3 FPGAs and SoC FPGAs C-Series, Cyclone® V GX FPGA, Cyclone® V ST SoC FPGA, Agilex® 5 FPGAs and SoC FPGAs D-Series, Stratix® 10 GX FPGA, Arria® V GT FPGA, Cyclone® 10 LP FPGA, Agilex® 7 FPGAs and SoC FPGAs F-Series, Cyclone® 10 GX FPGA, Stratix® 10 AX SoC FPGA
Offering Status Production
Integrated Testbench Yes
Evaluation License No
Design Examples Available No
Demo No
Compliance No
Latest Quartus Version Supported 25.3.1
OS Support Linux,Windows
Development Language Encrypted VHDL

IP (encrypted RTL to full source code depending on licensing)

Reference Design

Documentation

Ordering Information

10GEDEK

from Direct

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