partner-offering-banner.png

TSN-SE: TSN Ethernet Switched Endpoint Controller

Computer Aided Software Technologies, Inc (dba CAST)

Member

The TSN-SE implements a configurable controller meant to ease the implementation of switched endpoints for Time Sensitive Networking (TSN) Ethernet networks. It integrates hardware stacks for timing synchronization (IEEE 802.1AS-2020), traffic shaping (IEEE 802.1Qav and IEEE 802.1Qbv), frame-preemption (IEEE 802.1Qbu and IEEE 802.3br) and a low-latency Ethernet MAC. Enhanced reliability features can also be supported, using the optional hardware modules for Frame Replication and Elimination for Reliability (IEEE 802.1CB) and Per-Stream Filtering and Policing (IEEE 802.1Qci).

The controller core is designed to enable high-precision timing synchronization and flexible yet accurate traffic scheduling. With cut-through switching and minimal buffering even at the Ethernet MAC level, the TSN-SE features extremely low and deterministic ingress and egress latencies and simplifies the development of time-aware applications. Furthermore, it allows the system to de...

The TSN-SE implements a configurable controller meant to ease the implementation of switched endpoints for Time Sensitive Networking (TSN) Ethernet networks. It integrates hardware stacks for timing synchronization (IEEE 802.1AS-2020), traffic shaping (IEEE 802.1Qav and IEEE 802.1Qbv), frame-preemption (IEEE 802.1Qbu and IEEE 802.3br) and a low-latency Ethernet MAC. Enhanced reliability features can also be supported, using the optional hardware modules for Frame Replication and Elimination for Reliability (IEEE 802.1CB) and Per-Stream Filtering and Policing (IEEE 802.1Qci).

The controller core is designed to enable high-precision timing synchronization and flexible yet accurate traffic scheduling. With cut-through switching and minimal buffering even at the Ethernet MAC level, the TSN-SE features extremely low and deterministic ingress and egress latencies and simplifies the development of time-aware applications. Furthermore, it allows the system to define and tune in real time the traffic shaping parameters according to an application’s requirements, and provides the system with timing information (timestamps, alarms, etc.) that is typically required for the operation of a TSN network bridge or endpoint.

The TSN-SE uses standard AMBA® interfaces to ease integration. Its configuration and status registers are accessible via a 32-bit-wide APB bus, and packet data are input and output via AXI-Streaming interfaces with 32-bit data buses. To further expedite and ease the implementation of customer applications, DMA engines providing access to the stream interfaces via a memory-mapped AXI4 master port, and software stacks supporting higher-layer protocols, such as IEEE 802.1Qcc, IEEE 802.1Qca and SNMP, are optionally available

View Partner Website Right arrow Right arrow Partner Product Page Right arrow Right arrow Contact Now

Key Features

  • 802.1AS-2020 FreeRTOS and Linux gPTP stack
  • 802.1Qav, 802.1Qbv
  • 802.1Qci, 802.1CB, 802.1Qbu/802.3br, 802.1Qcc, 802.1Qca
  • 2-port Cut-Through Ethernet Layer 2 switch
  • Drivers, HAL, CLI
  • MII/GMII/RGMII interfaces
  • AXI-Stream interface
  • FreeRTOS and Linux drivers

Offering Brief

Offering Brief

Device Family Arria® V GT FPGA, Arria® V GX FPGA, Arria® V GZ FPGA, Arria® V ST SoC FPGA, Arria® V SX SoC FPGA, Cyclone® IV E FPGA, Cyclone® IV GX FPGA, Cyclone® V E FPGA, Cyclone® V GT FPGA, Cyclone® V GX FPGA, Cyclone® V SE SoC FPGA, Cyclone® V ST SoC FPGA, Cyclone® V SX SoC FPGA, Agilex® 3 FPGAs and SoC FPGAs C-Series, Agilex® 5 FPGAs and SoC FPGAs D-Series, Agilex® 5 FPGAs and SoC FPGAs E-Series, Agilex® 7 FPGAs and SoC FPGAs F-Series, Agilex® 7 FPGAs and SoC FPGAs I-Series, Agilex® 7 FPGAs and SoC FPGAs M-Series, Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX SoC FPGA, Cyclone® 10 GX FPGA, Cyclone® 10 LP FPGA, Stratix® 10 AX SoC FPGA, Stratix® 10 DX FPGA, Stratix® 10 GX FPGA, Stratix® 10 SX SoC FPGA, Stratix® 10 TX FPGA, Stratix® III FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA
Offering Status Production
Integrated Testbench Yes
Evaluation License Yes
Design Examples Available Yes
Demo No
Compliance Yes
Latest Quartus Version Supported 24.3.1
Development Language Encrypted Verilog, Verilog

Verilog/System Verilog, Encrypted Verilog/System Verilog or FPGA netlist

Sample integration testbench

Sample Simulation and Synthesis scripts

Comprehensive Documentation

Lightweight PTP stack

Device driver for FreeRTOS and Linux

CLI for FreeRTOS or Linux

HAL for FreeRTOS

Ordering Information

TSN-SE

from Direct

Order Now

Market Segment and Sub-Segments

Aerospace-Avionics-252x228.svg

Aerospace

View Sub-Segments

Aerospace

Aerospace

Back to Market
Electronic-Warfare-252x228 (1).svg

Defense

View Sub-Segments

Defense

MIL COMMS

Back to Market
Government-Analytics-252x228.svg

Government

View Sub-Segments

Government

Govt Infrastructure

Back to Market
Robotics-252x228.svg

Industrial

View Sub-Segments

Industrial

Energy

Industrial / Manufacturing

Robotics

Vision

Back to Market
Medical-Video-and-Vision-252x228.png

Medical

View Sub-Segments

Medical

Imaging

Other Medical

Ultrasound

Video

Back to Market
Software-Defined-Vehicle-252x228.svg

Transportation

View Sub-Segments

Transportation

Automotive (Passenger Vehicles)

Non-Automotive Transportation

Transportation Infrastructure (non-charging)

Back to Market
MMW.png

Wireless

View Sub-Segments

Wireless

Baseband

Back to Market