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PCI-M32MF 32-bit/33MHz Multi-Function PCI Master/Target

Computer Aided Software Technologies, Inc (dba CAST)

Member

The PCI-M32MF implements a master/target PCI interface compliant with the PCI 2.3 specification. It supports a 32-bit address/data bus and operates up to 33 MHz PCI clock. The core offers one to eight independent PCI functions in a single chip, each implementing 64 to 256 bytes of PCI Configuration Space registers as required. Each function supports up to six Base Address Registers, with both I/O and Memory space decoding from 16 bytes up to 4GB.

The PCI- M32MF builds on more than 20 years of CAST PCI IP expertise and has been designed for straightforward reuse, with proven design practices that ensure easy integration and smooth technology mapping. The core is available in synthesizable RTL or as a targeted FPGA netlist, and is delivered with everything required for rapid and successful integration and implementation.

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Key Features

  • Fully compliant with PCI Local Bus Specification, Revision 2.3
  • 32-bit datapath with 33 MHz performance
  • Master/Target support for config, memory, and I/O read/write commands
  • Zero wait states during burst mode transfers
  • Supports all PCI interrupt pins: INTA#, INTB#, INTC#, INTD#
  • Implements Type 0 PCI Configuration space
  • Full support for Base Address Registers (BARs)
  • Backend-initiated retry, disconnect, abort; with parity gen and error detection
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Offering Brief

Offering Brief

Device Family Arria® V GT FPGA, Arria® V GX FPGA, Arria® V GZ FPGA, Arria® V ST SoC FPGA, Arria® V SX SoC FPGA, Cyclone® III FPGA, Cyclone® IV E FPGA, Cyclone® IV GX FPGA, Cyclone® V E FPGA, Cyclone® V GT FPGA, Cyclone® V GX FPGA, Cyclone® V SE SoC FPGA, Cyclone® V ST SoC FPGA, Cyclone® V SX SoC FPGA, Cyclone® 10 GX FPGA, Cyclone® 10 LP FPGA, MAX® 10 FPGA, Stratix® III FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA
Offering Status Production
Integrated Testbench Yes
Evaluation License Yes
Design Examples Available Yes
Demo No
Compliance Yes
Latest Quartus Version Supported 24.3.1
Development Language Encrypted Verilog, Encrypted VHDL, Verilog, VHDL

Verilog/System Verilog, Encrypted Verilog/System Verilog, VHDL, Encrypted VHDL, or FPGA netlist

Sample integration testbench

Comprehensive documentation

Sample synthesis and simulation scripts

Software model

Ordering Information

PCI-M32MF

from Direct

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