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JESD204B TRANSMITTER AND RECEIVER IP

Logic Fruit Global Technologies Inc

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Logic Fruit Technologies has designed JESD204B RTL IP. It can support increased lane rates up to 12.5Gbps for higher bandwidth applications. It can be configured to transmit or receive using a 8B10B link layer to achieve deterministic latency, SerDes synchronization, clock recovery and DC balance.

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Key Features

  • Applicable in RADAR, Medical Imaging as it supports higher bandwidth and more number of channels with fewer pins to simplify layout.
  • Applicable in Wireless Communications, TDMA & OFDM based technologies such as LTE, WiMAX.
  • Provides reduced PCB area and package size.
  • Comparable power for large throughput.
  • Provides interface for serializing devices from some system designs, reducing space, power, and cost.
  • Mechanism to achieve Deterministic latency across the serial link.
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Offering Brief

Offering Brief

Device Family Arria® 10 SX SoC FPGA, Arria® 10 GT FPGA, Arria® V GZ FPGA
Offering Status Production
Integrated Testbench Yes
Evaluation License No
Design Examples Available Yes
Demo No
Compliance No
Latest Quartus Version Supported 24.3.1
Development Language VHDL

VHDL Design Files

VHDL Test Bench

VHDL Test Cases

Log Files of Simulation Results

Ordering Information

sales@logic-fruit.com

from Direct

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Documentation & Resources

design hub icon JESD204B TRANSMITTER AND RECEIVER IP

Market Segment and Sub-Segments

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Aerospace

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Aerospace

Aerospace

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Defense

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Defense

MIL COMMS

Radar/Ew

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Medical

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Medical

Imaging

Lab/Life Sciences

Non-Imaging Patient Devices

Other Medical

Ultrasound

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Digital Test Vision

Test

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Test

ATE

Communication Tester

RF Instrumentation

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Wireless

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Wireless

5G/ 6G Radio

AI-RAN

Baseband

DAS/repeater/RIS

NTN/Fixed Wireless

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