HyperBus Controller (Silicon Proven IP for Altera Devices)

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Mobiveil Inc.

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Configurable HyperBus Flash Memory Controller for HyperFlash/HyperRAM, delivering continuous-burst reads, 0-wait-state write bursts (AXI up to 256 words), AXI-lite control, and device clocks up to 166 MHz for high throughput with a 12-pin low-pin-count interface. Mobiveil’s HyperBus controller is technology-independent, system-validated RTL that interfaces to Spansion/Infineon-style HyperBus devices. It supports true continuous-burst read for HyperFlash, minimum inter-read gaps to maximize read performance, cache-line XiP fetches, 0-wait-state write bursts on the AXI side, and up to 16 outstanding addresses. Deliverables include configurable RTL, HDL testbench, protocol checkers, bus watchers, performance monitors, and design/verification guides.

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Key Features

Compatible with spansion hyperbus based memory products
0 Wait State Write Burst Operation for HyperBus memory on AXI interface of up to 256 words
AXI-lite port for control registers accesses
True Continuous Burst Read operation for HyperFlash on HyperBus memory interface
Minimum Gap between two Read Operations for highest performance on HyperBus memory interface
Cache Line accesses for Execution-in-Place (XiP)
HyperBus memory device clock of upto 166MHz
Up to 16 outstanding address support in AXI
Internal FIFO Depths is configurable
AXI parameters configurable

Offering Brief

Device Family	Arria® II GX FPGA, Arria® V GT FPGA, Arria® V GX FPGA, Arria® V GZ FPGA, Arria® V ST SoC FPGA, Arria® V SX SoC FPGA, Cyclone® III FPGA, Cyclone® IV E FPGA, Cyclone® IV GX FPGA, Cyclone® V E FPGA, Cyclone® V GT FPGA, Cyclone® V GX FPGA, Cyclone® V SE SoC FPGA, Cyclone® V ST SoC FPGA, Cyclone® V SX SoC FPGA, Agilex® 3 FPGAs and SoC FPGAs C-Series, Agilex® 5 FPGAs and SoC FPGAs D-Series, Agilex® 5 FPGAs and SoC FPGAs E-Series, Agilex® 7 FPGAs and SoC FPGAs F-Series, Agilex® 7 FPGAs and SoC FPGAs I-Series, Agilex® 7 FPGAs and SoC FPGAs M-Series, Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX SoC FPGA, Cyclone® 10 GX FPGA, Cyclone® 10 LP FPGA, MAX® 10 FPGA, Stratix® 10 AX SoC FPGA, Stratix® 10 DX FPGA, Stratix® 10 GX FPGA, Stratix® 10 SX SoC FPGA, Stratix® 10 TX FPGA, eASIC™ N3X Devices, eASIC™ N3XS Devices, Stratix® III FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA
Offering Status	Production
Integrated Testbench	Yes
Evaluation License	Yes
Design Examples Available	No
Demo	No
Compliance	No
Latest Quartus Version Supported	24.3.1
Development Language	Encrypted Verilog, Verilog