NetTimeLogic’s PTP Transparent Clock (TC) is a full hardware (FPGA) only implementation of an Transparent Clock according to IEEE1588-2019 (PTP).
It is intended to wrap non-deterministic Ethernet cores/devices like Bridges, Switches or Redundancy Nodes and runs the whole protocol handling, algorithms and calculations are implemented in the core, no CPU is required which allows running PTP synchronization completely independent and standalone.
The TC can run as an E2E or P2P TC and supports the following PTP Profiles: Default Profile, Power Profile, Utility Profile, TSN Profile (802.1AS) and ITU Profiles (ITU-T-G82651/G82751/G82752)