partner-offering-banner.png

NTP Client

NetTimeLogic GmbH

Select

NetTimeLogic’s NTP Client is a full hardware (FPGA) only implementation of an SNTPv4 Client according to RFC 4330/5905 and supports hardware timestamping and insertion with 4ns resolution. It is mainly intended to synchronize to a local NTP Server (one Server only); however, it can of course also synchronize to the NTP pool (pool.ntp.org). It supports the NTP unicast and multicast mode (IPv4/IPv6), allows for arbitrary request rates of multiple requests per second and does the conversion from TAI to UTC (taking leap seconds and smearing into account) .

Key Features

  • SNTP Client according to RFC 4330/5905
  • Intercepts path between MAC and PHY
  • IPv4 and IPv6
  • Unicast requests at configurable intervals (also faster than 1/s)
  • Process Unicast/Multicast responses from the NTP Server
  • Hardware timestamping on (R)(G)MII level
  • Support for UTC leap second handling (jump or smearing)
  • Optional leap second smearing (configurable rate)
  • Hardware PI Servo and Filtering
  • AXI4Lite register set or static configuration
Expand Close
Keyfeatures main image

Offering Brief

Offering Brief

Device Family Arria® 10 SX SoC FPGA, Cyclone® IV GX FPGA, Agilex® 5 FPGAs and SoC FPGAs E-Series, MAX® 10 FPGA, Cyclone® V SX SoC FPGA, Arria® V GZ FPGA, Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series, Agilex® 7 FPGAs and SoC FPGAs I-Series, Arria® V SX SoC FPGA, Stratix® 10 DX FPGA, Stratix® 10 SX SoC FPGA, Agilex® 7 FPGAs and SoC FPGAs M-Series, Cyclone® V GT FPGA, Arria® 10 GT FPGA, Arria® V ST SoC FPGA, Arria® 10 GX FPGA, Stratix® 10 TX FPGA, Cyclone® V SE SoC FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Arria® V GX FPGA, Cyclone® V E FPGA, Agilex® 3 FPGAs and SoC FPGAs C-Series, Cyclone® V GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA, Cyclone® V ST SoC FPGA, Agilex® 5 FPGAs and SoC FPGAs D-Series, Stratix® 10 GX FPGA, Arria® V GT FPGA, Cyclone® 10 LP FPGA, Agilex® 7 FPGAs and SoC FPGAs F-Series, Cyclone® 10 GX FPGA, Cyclone® IV E FPGA, Stratix® 10 AX SoC FPGA
Offering Status Production
Demo No
Integrated Testbench Yes
Evaluation License Yes
Design Examples Available Yes
Compliance No
Latest Quartus Version Supported 25.1.0
OS Support Not required
Development Language VHDL

Source Code

Ordering Information

Documentation & Resources

Market Segment and Sub-Segments