Adjustable Clock

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NetTimeLogic GmbH

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The Adjustable Clock from NetTimeLogic is an adjustable counter clock with nanosecond resolution (second and nanosecond format), which is used by all other cores from NetTimeLogic but can also be used as standalone core. It contains a hardware implemented PI servo loop for smooth adjustment of frequency and phase, which can be adjusted in parallel and individual. It has multiple adjustment inputs which are multiplexed to define the source of synchronization and an addvance holdover calculation for situations where no synchronization source is available.

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Key Features

32 bit second and 32 bit nanosecond counter clock with fractional extention
1 millisecond pulse generator aligned with the counter clock
Allows non-integer clock periods
Multiplexing of multiple adjustment inputs
Evenly spread offset and drift correction (offset might be set hard in case of large offsets), hard setting of time possible
Individual hardware only PI servo loops for offset and drift correction (PI parameters individually configurable)
Runtime changeable PI servo parameters
Offset correction: min 1/2^16 ns / s, max 0.5 s/s, Drift correction: min 1/2^16 ns / s, max 0.05 s/s
Conversion of fractional adjustments into even spread clock adjustments
Optional Advanced Holdover Correction calculation as average of adjustments over a configurable window plus aging compensation
Optional outlier filter, rate limiter
AXI4 Light register set or static configuration, can represent a PHC clock in Linux

Offering Brief

Device Family	Arria® 10 SX SoC FPGA, Cyclone® IV GX FPGA, Agilex® 5 FPGAs and SoC FPGAs E-Series, MAX® 10 FPGA, Cyclone® V SX SoC FPGA, Arria® V GZ FPGA, Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series, Agilex® 7 FPGAs and SoC FPGAs I-Series, Arria® V SX SoC FPGA, Stratix® 10 DX FPGA, Stratix® 10 SX SoC FPGA, Agilex® 7 FPGAs and SoC FPGAs M-Series, Cyclone® V GT FPGA, Arria® 10 GT FPGA, Arria® V ST SoC FPGA, Arria® 10 GX FPGA, Stratix® 10 TX FPGA, Cyclone® V SE SoC FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Arria® V GX FPGA, Cyclone® V E FPGA, Agilex® 3 FPGAs and SoC FPGAs C-Series, Cyclone® V GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA, Cyclone® V ST SoC FPGA, Agilex® 5 FPGAs and SoC FPGAs D-Series, Stratix® 10 GX FPGA, Arria® V GT FPGA, Cyclone® 10 LP FPGA, Agilex® 7 FPGAs and SoC FPGAs F-Series, Cyclone® 10 GX FPGA, Cyclone® IV E FPGA, Stratix® 10 AX SoC FPGA
Offering Status	Production
Demo	No
Integrated Testbench	Yes
Evaluation License	Yes
Design Examples Available	Yes
Compliance	No
Intertop	ISPCS, IIC
Latest Quartus Version Supported	25.1.0
OS Support	Linux
Development Language	VHDL