USB 2.0 On-The-Go (OTG) IP Core is a 32-bit Avalon interface compliant core and supports ULPI interface. It supports both USB Host and USB Device peripheral functionality. While acting as USB Host, it supports High Speed (HS), Full Speed (FS) and Low Speed (LS) modes. While acting as USB Device peripheral, it supports High Speed (HS) and Full Speed (FS) modes.
IP core has been implemented in Verilog HDL and its functionality has been verified using different test cases in simulation environment as well as on hardware. It is provided as Platform Designer (formerly Qsys) Ready component and hence can be easily integrated in Platform Designer system.