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XIP1113E: AES-GCM Authenticated Encryption, Extreme-Speed

Xiphera Ltd.

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Extreme speed AES256-GCM core implements the Advanced Encryption Standard (AES) in Galois Counter Mode (GCM) with up to 800G linerate. AES-GCM is a widely used cryptographic algorithm for Authenticated Encryption with Associated Data (AEAD) purposes, providing both data confidentiality and authenticity.

Key Features

  • High Security: XIP1113E implements AES256-GCM authenticated encryption as defined in the NIST standards FIPS PUB 197 [1] and Special Publication 800-38D [2], and offers a security level of 256 bits.
  • Extremely High Throughput: XIP1113E offers extremely high throughput for a single stream of data as it processes one 32/64/128-byte block per clock cycle and has a high maximum clock frequency. The IP cores of XIP1113E achieve throughputs of hundreds of Gbps depending on the target FPGA.
  • Constant Latency: XIP1113E offers constant latency for every data block and has a deter- ministic latency that facilitates an easy integration to various systems.
  • Secure Design: XIP1113E executes encryption and decryption in constant time (that is, in- dependent of the value of the key), and therefore provides full protection against timing side-channel attacks.
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Offering Brief

Offering Brief

Device Family Arria® 10 SX SoC FPGA, Cyclone® IV GX FPGA, Agilex® 5 FPGAs and SoC FPGAs E-Series, MAX® 10 FPGA, Cyclone® V SX SoC FPGA, Arria® V GZ FPGA, Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series, Agilex® 7 FPGAs and SoC FPGAs I-Series, Arria® V SX SoC FPGA, Stratix® 10 DX FPGA, Stratix® 10 SX SoC FPGA, Agilex® 7 FPGAs and SoC FPGAs M-Series, Cyclone® V GT FPGA, Arria® 10 GT FPGA, Arria® V ST SoC FPGA, Arria® 10 GX FPGA, Stratix® 10 TX FPGA, Cyclone® V SE SoC FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Arria® V GX FPGA, Agilex® 3 FPGAs and SoC FPGAs C-Series, Cyclone® V GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA, Cyclone® V ST SoC FPGA, Agilex® 5 FPGAs and SoC FPGAs D-Series, Stratix® 10 GX FPGA, Arria® V GT FPGA, Cyclone® 10 LP FPGA, Agilex® 7 FPGAs and SoC FPGAs F-Series, Cyclone® 10 GX FPGA, Stratix® 10 AX SoC FPGA, Stratix® III FPGA
Offering Status Production
Integrated Testbench Yes
Evaluation License Yes
Design Examples Available Yes
Demo No
Compliance Yes
Latest Quartus Version Supported 25.1.1
Development Language Encrypted Verilog, Verilog

Encrypted RTL or source code

Sample synthesis scripts

Instantiation file

Detailed datasheet and integration guide

Optional netlist

Ordering Information

Market Segment and Sub-Segments