partner-offering-banner.png

XIP2201B: ASCON, A Lightweight Cryptographic Suite for AEAD and Hashing, balanced (XIP22

Xiphera Ltd.

Select

Ascon IP core implements a lightweight, sponge-based encryption algorithm, being ideal for constrained environments such as IoT devices. Ascon performs three cryptographic primitives: Authenticated Encryption with Associated Data (AEAD), hashing, and extendable output function (XOF), offering a smaller alternative for e.g. AES-GCM and SHA-3 IP cores.

Key Features

  • Small Resource Requirements: XIP2201B requires only approximately 2100 Logic Elements (LEs) on a typical FPGA implementation and can still provide over 2 Gbps throughput.
  • Versatile Algorithm Support: XIP2201B supports ASCON-128/128a/80pq/Hash/Hasha as well as XOF and XOFa. In other words, XIP2201B supports all parameterized algorithms given in [2].
  • Secure Architecture: The execution time of XIP2201B is independent of the input values and, consequently, provides full protection against timing-based side-channel attacks.
  • Standard Compliance: XIP2201B is compliant with Ascon specification 1.2 (31.05.2021) [2] which is the version that was selected to be standardized by NIST [1]. Xiphera commits to update XIP2201B when the standardization proceeds to newer versions.
  • Easy Integration: The 64-bit interface of XIP2201B supports easy integration to various systems.
Expand Close
Keyfeatures main image

Offering Brief

Offering Brief

Device Family Arria® 10 SX SoC FPGA, Cyclone® III FPGA, Cyclone® IV GX FPGA, Agilex® 5 FPGAs and SoC FPGAs E-Series, MAX® 10 FPGA, Cyclone® V SX SoC FPGA, Arria® V GZ FPGA, Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series, MAX® V CPLD, Agilex® 7 FPGAs and SoC FPGAs I-Series, Arria® V SX SoC FPGA, Stratix® 10 DX FPGA, Stratix® 10 SX SoC FPGA, Agilex® 7 FPGAs and SoC FPGAs M-Series, Cyclone® V GT FPGA, Arria® 10 GT FPGA, Arria® V ST SoC FPGA, Arria® 10 GX FPGA, Stratix® 10 TX FPGA, Cyclone® V SE SoC FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Arria® V GX FPGA, Cyclone® V E FPGA, Agilex® 3 FPGAs and SoC FPGAs C-Series, Cyclone® V GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA, Cyclone® V ST SoC FPGA, Agilex® 5 FPGAs and SoC FPGAs D-Series, Stratix® 10 GX FPGA, Arria® V GT FPGA, Cyclone® 10 LP FPGA, Agilex® 7 FPGAs and SoC FPGAs F-Series, Cyclone® 10 GX FPGA, Stratix® 10 AX SoC FPGA, Cyclone® IV E FPGA, Stratix® III FPGA
Offering Status Production
Integrated Testbench Yes
Evaluation License Yes
Design Examples Available Yes
Demo No
Compliance Yes
Latest Quartus Version Supported 25.1.1
Development Language Encrypted Verilog, Verilog

Encrypted RTL or source code

Optional netlist

Sample synthesis scripts

Instantiation file

Comprehensive simulation test bench, scripts & guide

Detailed datasheet and integration guide

Ordering Information

Market Segment and Sub-Segments