PIB is an intelligent development platform based on an Intel x86 i7 CPU and Cyclone V GT FPGA, designed for applications such as industrial control, vision optimization, and edge computing. By combining the FPGA’s reconfigurability with the CPU’s software programmability, it offers vast innovation potential, leveraging the i7’s powerful computing performance alongside the FPGA’s parallel processing, low latency, and precise computation.
Terasic Inc.
Key Features
- Combines an Altera Cyclone V GT FPGA with an i7-1165G7 CPU for a flexible, embedded co‑development platform
- Dual high‑speed PCIe lanes connect the FPGA and CPU, ensuring low‑latency, high‑throughput communication
- Rich array of on‑board I/O and multimedia peripherals
Offering Brief
Offering Brief
| Device Family | Cyclone® V GT FPGA |
|---|---|
| Offering Status | Sampling |
| Form Factor | 250*170 mm |
| Power | 12V |
| Interfaces | LVDS Camera x4, MIPI Camera x2, Gigabit Ethernet x5, USB 3.0 x3, USB 2.0 x1,SATA x1, mSATA x1 |
| Memory | 1GB DDR3, |
| Connectors | tGPIO x2, 20-pin GPI |
| Switches & LEDs | Reset Button, Power Button, Power LED, User-Programmable LEDs, Switch and Button |
| Latest Quartus Version Supported | 20.0.0 |
Document
Ordering Information
P0774
from Direct
