partner-offering-banner.png

CoaXPress Host IP Core

Sensor to Image GmbH

Select

Sensor to Image offers a set of IP cores and a development framework to build FPGA-based receivers using the CoaXPress interface. Compact and customizable, they support speeds from 1 Gbps up to 100 Gbps, and are delivered as working reference design.

View Partner Website Right arrow Right arrow Partner Product Page Right arrow Right arrow Contact Now

Key Features

  • CoaXPress 2.1 IP for host/receiver applications
  • Support of multiple connections
Expand Close
Keyfeatures main image

Offering Brief

Offering Brief

Device Family Agilex® 5 FPGAs and SoC FPGAs D-Series, Agilex® 5 FPGAs and SoC FPGAs E-Series, Agilex® 7 FPGAs and SoC FPGAs F-Series, Agilex® 7 FPGAs and SoC FPGAs I-Series, Agilex® 7 FPGAs and SoC FPGAs M-Series, Arria® 10 GX FPGA, Cyclone® 10 GX FPGA
Offering Status Production
Integrated Testbench No
Evaluation License No
Design Examples Available Yes
Demo No
Compliance Yes
Intertop JIIA Compliance Test
Latest Quartus Version Supported 24.3.1
Development Language VHDL, Encrypted VHDL

Reference Design for Altera Evaluation Kit

CXP Interface FMC card

Documentation

Training

Support

Ordering Information

CoaXPress Host IP Core

from Direct

Order Now

Market Segment and Sub-Segments

Aerospace-Avionics-252x228.svg

Aerospace

View Sub-Segments

Aerospace

Aerospace

Back to Market
Electronic-Warfare-252x228 (1).svg

Defense

View Sub-Segments

Defense

MIL COMMS

Back to Market
Robotics-252x228.svg

Industrial

View Sub-Segments

Industrial

Vision

Back to Market
Medical-Video-and-Vision-252x228.png

Medical

View Sub-Segments

Medical

Imaging

Back to Market