NVMe Streamer 5.0: NVMe IP PCIe Gen5 High-speed Data Streaming - MLE FPGA Design

Overview Key Features Offering Brief What's Included Ordering Information Markets

NVMe Streamer is a fully integrated and pre-validated subsystem stack operating the NVMe protocol fully in Programmable Logic (PL) with no software running, keeping the Processing System (PS) out of this performance path.

View Partner Website

Contact Now

Contact

LeadSource

ASAP Account ID

Record Type Name

Key Features

Highly modular TCP/UDP/IP stack implementation in synthesizable HDL
Full line rate of 70 Gbps or more in FPGA, 100 Gbps or more in ASIC
128-bit wide bi-directional data paths with streaming interfaces
Multiple, parallel TCP engines for scalable processing
Network Interface Card functionality with Bypass (optional)
DPDK Stream interface (optional)
Corundum NIC integration with performance DMA and PCIe (optional)

Offering Brief

Device Family	Agilex® 3 FPGAs and SoC FPGAs C-Series, Agilex® 5 FPGAs and SoC FPGAs D-Series, Agilex® 5 FPGAs and SoC FPGAs E-Series, Agilex® 7 FPGAs and SoC FPGAs F-Series, Agilex® 7 FPGAs and SoC FPGAs I-Series, Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series, Stratix® 10 GX FPGA, Stratix® 10 SX SoC FPGA
Offering Status	Development
Integrated Testbench	No
Evaluation License	No
Design Examples Available	No
Demo	No
Compliance	No
Latest Quartus Version Supported	25.1.1
Development Language	Verilog, VHDL