DI3CS Target Device

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The DI3CS device is an I3C Target that complies with the MIPI® Alliance I3C Basic Specification. As an I3C Target Controller, it is a peripheral device designed to communicate with an I3C Master over the I3C bus. I3C, or Improved Inter-Integrated Circuit, provides an advanced, high-speed communication protocol that builds on I2C’s legacy while offering improvements in speed, power efficiency, and scalability.

The DI3CS device implements all the required functions defined by the I3C Basic specification and several optional features. It is designed for ease of integration and efficient operation in systems with other I3C devices. Implemented features includes handling of Single Data Rate (SDR), Double Data Rate (DDR), Dynamic Address Assignment, In-Band Interrupt (IBI) generation, Hot-Join generation, Common Command Codes execution, Error Detection and Target Reset functionality.

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Key Features

MIPI I3C Basic Specification v1.2 compiliance
Native 32-bit CPU Interface
Legacy I2C communication with 7-bit Static Address
I3C Single Data Rate (SDR) mode
Double Data Rate (DDR) suport
Dynamic Adress Assignment (DAA) support
Common Command Codes (CCC) execution
In-Band Interrupts (IBI) suport
Hot-Join (HJ) support
Target Reset mechanism supprot
TE0-TE6 Errors detection and recovery (SDR)
Frame, parity, CRC, data errors detection and recovery (DDR)

Offering Brief

Device Family	Arria® II GX FPGA, Arria® V GT FPGA, Arria® V GX FPGA, Arria® V GZ FPGA, Arria® V ST SoC FPGA, Arria® V SX SoC FPGA, Cyclone® III FPGA, Cyclone® IV E FPGA, Cyclone® IV GX FPGA, Cyclone® V E FPGA, Cyclone® V GT FPGA, Cyclone® V GX FPGA, Cyclone® V SE SoC FPGA, Cyclone® V ST SoC FPGA, Cyclone® V SX SoC FPGA, Agilex® 3 FPGAs and SoC FPGAs C-Series, Agilex® 5 FPGAs and SoC FPGAs D-Series, Agilex® 5 FPGAs and SoC FPGAs E-Series, Agilex® 7 FPGAs and SoC FPGAs F-Series, Agilex® 7 FPGAs and SoC FPGAs I-Series, Agilex® 7 FPGAs and SoC FPGAs M-Series, Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX SoC FPGA, Cyclone® 10 GX FPGA, Cyclone® 10 LP FPGA, MAX® 10 FPGA, Stratix® 10 AX SoC FPGA, Stratix® 10 DX FPGA, Stratix® 10 GX FPGA, Stratix® 10 SX SoC FPGA, Stratix® 10 TX FPGA, eASIC™ N3X Devices, eASIC™ N3XS Devices, MAX® V CPLD, Stratix® III FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA
Offering Status	Production
Integrated Testbench	Yes
Evaluation License	Yes
Design Examples Available	Yes
Demo	No
Compliance	No
Latest Quartus Version Supported	25.1.1
Development Language	Encrypted Verilog, Verilog