MIPI H.265

Overview Key Features Offering Brief What's Included Ordering Information Markets

Qbit Labs Incorporation

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The MIPI H.265 IP Core, based on the High Efficiency Video Coding (HEVC) standard, is an advanced video compression solution optimized for ultra-high-definition (UHD) video applications.

Delivering up to 50% better compression than H.264 at the same visual quality, this IP core enables efficient streaming, transmission, and storage of 4K and 8K video content while reducing bandwidth and power requirements.

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Key Features

Fully Compliant with HEVC (ITU-T H.265 | ISO/IEC 23008-2): Supports Main, Main 10 profiles up to Level 5.1
Ultra-High-Definition Support: Resolution scaling from QVGA up to 8K @ 60fps Ideal for 4K video conferencing, UHD streaming, AR/VR displays
Advanced Compression Techniques: CTU-based coding (up to 64x64), improved motion estimation SAO (Sample Adaptive Offset), deblocking filters, and advanced rate control
MIPI Native Integration: Direct interface with MIPI CSI-2 (camera) and DSI-2 (display) pipelines Compatible with D-PHY/C-PHY-based sensor and display modules
Flexible I/O Interface: AXI4-Stream, AXI4-Lite, FIFO, or AHB/APB compatible interfaces
Multi-Stream Capable: Supports multiple simultaneous video streams for recording and display

Offering Brief

Device Family	Agilex™ 5 FPGA D-Series, Agilex™ 5 FPGA E-Series, Agilex™ 7 FPGA F-Series, Agilex™ 7 FPGA I-Series, Agilex™ 7 FPGA M-Series, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX FPGA, Stratix® 10 AX FPGA, Stratix® 10 DX FPGA, Stratix® 10 GX FPGA, Stratix® 10 SX FPGA, Stratix® 10 TX FPGA
Offering Status	Production
Integrated Testbench	Yes
Evaluation License	Yes
Design Examples Available	Yes
Demo	No
Compliance	No
Latest Quartus Version Supported	24.3.1
OS Support	Linux, Android, RTOS with driver support
Development Language	Encrypted Verilog, Verilog

Synthesizable RTL source code

Directed/random/constrained-random sequences covering LTSSM, configuration, link training, FLIT mode, error injection (FEC/CRC scenarios), power states, reset

Embedded firmware / low-level SW

Software integration guide

Full design documentation