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Altera FPGA Designer Program

Looking to train your employees to become FPGA designers? The Altera FPGA Designer Program was developed for such purpose. The course intention is to train computer and electronics engineers from scratch to a practical work level. The course goes into great depth, and touches upon every aspect of the VHDL standard and Altera FPGA design with directly connected to the topics needed in the industry today. The course combines 50% theory with 50% practical work in every meeting with Terasic DE0-CV evaluation board. The practical labs cover all the theory and also include practical digital design. The program provides extra labs/mini projects for homework between meetings.

Altera® FPGA Design Services / IP Design Services - MLE

MLE offers FPGA design services for Altera® FPGAs, which give a wide variety of configurable embedded SRAM, high-speed transceivers, high-speed I/Os, logic blocks, and routing. Built-in intellectual property (IP) combined with outstanding software tools lower FPGA development time, power, and cost.

Andromeda IAE50

The Andromeda IAE50 SoC module features Altera® Agilex™ 5 FPGA E-Series devices with DDR5 memory, eMMC, QSPI flash, dual Gigabit Ethernet, and USB 3.1, forming a powerful embedded system. It supports vision, test and measurement, security, and communication applications with low latency and high bandwidth.

Apollo Agilex™ 7 SoM

Apollo Agilex® SOM takes advantage of the latest Altera® Agilex® 7 SoC FPGA with 1400K logic elements and combines high-end hardware interfaces such as high-capacity and high-bandwidth DDR4 SO-DIMM Sockets (up to 32GB DDR4), on-board QSFP28 connector, on-board USB-Blaster II, and FMC/FMC+ connectors for I/O expansion.

Apollo S10 SoM

Designed for modular and scalable high-performance FPGA Prototyping and HPC solutions, Apollo S10 SOM packs unbeatable performance and energy efficiency in a tiny form factor and provides up to 90X performance increase over CPUs for critical workloads such as simulation acceleration, molecular dynamics, machine learning.

ApSRAM Controller (will not be supported for FPGA devices, can be used during SoC Protyping in FPGA)

ApSRAM Controller is a low-latency, low-power IP scalable from 64Mb to 1Gb with multi-bank architecture for high throughput. Designed for AI/ML, edge, automotive, and IoT systems, it supports AXI interface and various silicon technologies. It simplifies SRAM replacement while ensuring compliance and interoperability.

ARINC 429 IP Core

Logic Fruit's ARINC 429 IP Core is a multichannel module with support for virtually any number of transmitters and Receivers. Both low speed (12.5 Kbps) and high speed (100 Kbps) data rates are supported for data transmission, along with other configurable data rates from 12.5 Kbps to 1 Mbps.

ARINC 429 IP Core

iWave’s ARINC 429 IP Core facilitates efficient data exchange between avionics equipment by supporting both transmit and receive functionalities with customizable data rates. Its robust error detection mechanisms and low power design make it an ideal choice for avionics systems requiring high data integrity and power efficiency.

ARINC 664 P7 IP Core

iWave’s ARINC 664 AFDX IP Core enables reliable, high-speed communication in avionics systems by supporting up to 8 Virtual Links with configurable Bandwidth Allocation Gap values. With hardware-implemented UDP/IP communication and redundancy management, it ensures deterministic data delivery, making it ideal for mission-critical aerospace applications.