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Atum A3 Nano

Terasic’s Atum A3 Nano delivers powerful performance in a compact, affordable platform. Powered by Altera’s largest Agilex 3 FPGA with 135K LEs, the board features 64MB of SDRAM, an onboard USB-Blaster III with USB Type-C connection, HDMI output, Gigabit Ethernet, and MicroSD storage—all within 85mm x 70mm form factor.

Atum A5 Development Kit

The Atum A5 Development Kit is Terasic’s first development kit in the Altera® Agilex™ 5 FPGA portfolio. Powered by the largest Agilex® 5 SoC FPGA with 656K LEs, the Atum A5 Development Kit is an out-of-the-box platform for advanced AI and vision application development.

Aurora 64B/66B IP Core

The ALSE Aurora 64B/66B is a complete and fully compliant implementation of the published protocol. It allows to interconnect Altera FPGAs to Altera and other vendors FPGAs through High-Speed Serial links, from 1Gb/s to 800 Gb/s.

Aurora 8B/10B IP Core

The ALSE Aurora 8B/10B IP Core makes this open protocol available to all Altera FPGAs (that include transceivers).

AVB MILAN IP

Complete Certified MILAN IP in an SoC-FPGA.

Backplane Ethernet 10GBASE-KR PHY FPGA IP

The Backplane Ethernet 10GBASE-KR PHY Altera FPGA Intellectual Property (IP) core is a transceiver PHY that allows you to instantiate the hard standard physical coding sublayer (PCS), the higher performance hard 10G PCS, and the hard physical medium attachment (PMA) for a single Backplane Ethernet channel.

Baseline JPEG Video Decoder IP Core

This compact, extremely efficient and low latency IP core is capable of decoding in real-time video on-the-fly using standard and ubiquitous JPEG compression, even on low-cost FPGAs. This IP does not require any processor nor any external memory.

Baseline JPEG Video Encoder IP Core

Very compact and very low latency JPEG/MPEG encoder ideal for video and still pictures. Output is fully standard and decoded by all viewers.

BlueFjord FBAP4@AGF series FPGA accelerator

The Silicom BlueFjord FPGA accelerator(FBAP4@AGF series) is a high-performance, OEM hardware acceleration platform tailored for compute-intensive server environments. It excels in tasks such as cryptographic processing, compression acceleration, and offloading 5G RAN functions like FEC/LDPC. Built on the Intel (Altera) Agilex™ 7 F-Series FPGA with a dual F-tile package and optionally featuring a Hard Processor System (HPS) with quad 64-bit ARM Cortex-A53 cores, it offers powerful, flexible logic capacity ranging from approximately 573K to 2,692K logic elements.