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The Creonic DOCSIS 3.1 LDPC decoder IP cores are a complete solution for the downstream forward error correction, i.e. PLC decoder, NCP decoder and data decoder are included.
By Creonic GmbH
The IP was developed to allow the performance evaluation of a low-earth orbit (LEO) digital communication system.
The Creonic DVB-C2 IP core integrates the forward error correction as defined by the standard (including LDPC and BCH decoder).
The Creonic DVB-GSE decapsulator performs the decapsulation of BBFRAMEs, containing one or more GSE packets.
The outstanding performance of the DVB-RCS turbo codes makes it the ideal candidate for further applications where high spectral efficiency is key for lowering costs.
The outstanding error correction performance of the DVB-RCS2 turbo decoder makes it the ideal candidate for further applications where high spectral efficiency is key for lowering costs.
The Creonic DVB-S2 LDPC / BCH Decoder and Encoder IP cores perform forward error correction as defined within the standard.
The Creonic DVB-S2 high performance demodulator IP core performs all tasks of an inner receiver. Its output perfectly fits the DVB-S2 forward error correction IP core from Creonic that implements LDPC and BCH decoding.
The Creonic DVB-S2X demodulator is a low-complexity high-performance solution that allows for symbol rates of up to 100 MSymb/s on state-of-the-art FPGAs and performs all tasks of an inner receiver.