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PCI-M32MF 32-bit/33MHz Multi-Function PCI Master/Target

The PCI-M32MF is a PCI 2.3-compliant master/target core supporting a 32-bit address/data bus at up to 33 MHz. It enables 1 to 8 independent PCI functions per chip, each with 64–256 bytes of Configuration Space and up to six Base Address Registers, supporting I/O and Memory decoding from 16 bytes to 4 GB. Backed by over 20 years of CAST PCI IP expertise, the core is designed for easy reuse and integration, and is available as synthesizable RTL or FPGA netlist with comprehensive deliverables.

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PCI-T32: 32-bit/33MHz PCI Target

The PCI-T32 is a 32-bit target PCI interface core compliant with PCI 2.3, operating at up to 33 MHz. It includes 64 bytes of PCI Configuration Space, expandable to 256 bytes, and supports six Base Address Registers for I/O or Memory decoding from 16 bytes to 4 GB. Supported commands include Configuration, Memory, and I/O Reads/Writes, as well as MRM, MRL, and MWI. Built on over 15 years of CAST PCI IP experience, the core is designed for easy reuse and integration. It is available in synthesizable RTL or as an FPGA netlist, with full integration support.

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PCI-T32MF: 32-bit, 33 MHz Multifunction Target Interface Core

The PCI-T32MF is a target-only PCI interface core compliant with the PCI 2.3 specification, supporting a 32-bit address/data bus and operating at up to 33 MHz. It allows one to eight independent PCI functions per chip, each with 64 to 256 bytes of PCI Configuration Space and up to six Base Address Registers, decoding I/O and Memory space from 16 bytes to 4GB. Developed with over 20 years of CAST PCI IP expertise, the core is optimized for easy reuse, integration, and technology mapping. It is available as synthesizable RTL or a targeted FPGA netlist, with full support for rapid implementation.

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PCIe Gen 5

PCIe Gen 5–based high-speed connectivity solution enabling up to 32 GT/s data transfer for next-generation servers, accelerators, storage, and embedded platforms, supporting low latency, high bandwidth, and scalable system integration.

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PCIe Gen5/6 Switch (FPGA IP for Altera Devices)

Mobiveil’s PCIe Gen6 Switch FPGA IP enables multi-port connectivity with support for bifurcation, NTB, and port arbitration. It is tailored for high-speed switching in data centers, HPC, and next-gen compute systems. The solution emphasizes low latency, scalable bandwidth, and flexible integration for Altera platforms.

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PCIe GEN6 Controller IP

The PCIe Gen 6 Controller IP supports the full PCI Express 6.x specification, offering scalable, high-speed communication for enterprise-grade solutions. FIRST in the industry to deliver PCIe IPs across multiple generations. It is: - Optimized for existing and emerging FPGA uses cases for hardening onto ASIC / SoC. - Best for large memory, compute-intensive and high data rate applications.

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PCIe GEN6 PHY IP

Logic Fruit's PCIe GEN6 PHY IP achieves data rates up to 64GT/s per lane with PAM4 signaling thereby delivering reliable performance for high-speed data transfer. It supports advanced applications, including AI/ML, High-Performance Computing, and next-generation storage solutions.

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PCIe to SD/MMC Bridge

iWave’s PCIe to SD/MMC Bridge IP Core enables high-speed communication between PCIe hosts and SD/MMC memory cards, supporting Gen1/Gen2 PCIe. With built-in DMA and AXI interface compatibility, the core ensures reliable and efficient data storage for embedded and FPGA-based systems.

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PCIe to SRIO Bridge Controller (FPGA IP for Altera Devices)

This Gen3 PCIe to SRIO Bridge enables full-speed protocol conversion with advanced messaging and DMA engines. Supporting aerospace, telecom, defense, and HPC, it ensures low-power, compact implementation. Ideal for embedded systems, it bridges PCIe versatility with SRIO performance.

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Showing 487-495 of 690 Offerings