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Proc Vision Suite – development and validating for imaging & vision on FPGA

Gidel’s ProcVision suite provides a market-unique ecosystem for developing high-performance custom imaging and vision systems based on FPGA. The suite enables FPGA-level customization of the Gidel frame grabbers and edge computers. Such customization includes tailoring of the acquisition path, the image processing, system architecture and more. The suite includes FPGA and SW libraries, templates, examples and tools for that accelerate development on FPGA and integration with software. The ProcWizard application that is part of the suite generates tailored board support package that optimizes the FPGA resources to the application needs. The ProcWizard also enables virtualization of the FPGA space such allowing for multiple applications to operate simultaneously on the FPGA. The suite also includes the CertifEye test bench that enables testing and verification of the full design on FPGA.

Proc10A-40GigE: 40GigE Vision Frame Grabber\Smart NIC

Proc10A-40GigE vision Frame Grabber & Image Processing System Smart NIC

Proc10A-CXP6: CoaXPress-6 Frame Grabber & Image Processing

The Proc10A-CXP6 is a 8 x CoaXPress-6 Frame Grabber card with option for real-time image processing and compression. The card is supported by off-the-shelf modular building blocks for embedding in the acquisition pipeline, including HDR, white balance, gamma correction, compression (JPG, lossless, Quality+), and more. It is also supported by Gidel's InfiniVision acquisition architecture, optimized for grabbing from 100 + cameras.

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Product Engineering Services

All Product Engineering Services and Solutions (ASIC/FPGA/SoC/Embedded/Hardware/PCB)

PROFIBUS Master Subsystem for Altera FPGA

The PROFIBUS DP Master Subsystem for Alter FPGAs integrates all components required for implementing a complete PROFIBUS DP Class1 and Class2 Master based on FPGA technology. Thus, no specific fieldbus controller ASIC is needed in addition.

PROFIBUS Slave Subsystem for Altera FPGA

PROFIBUS Slave for Altera FPGA provides an optimized PROFIBUS DP IP Core and a Communication Processor for the Integration of PROFIBUS DP and other industrial networks into field devices. It uses the same API for all supported protocols.

PROFINET Controller Subsystem for Altera FPGA

PROFINET Controller for Altera FPGA provides controller connectivity for PLC, PAC, DCS and similar systems. It comprises an industrial switch IP core and all required protocol software already running on a softcore processor. It is an encapsulated PROFINET communication subsystem simply downloadable into an FPGA.

PROFINET Device Subsystem for Altera FPGA

PROFINET Device for Altera FPGA provides an optimized Switch IP Core and a Communication Processor for the Integration of PROFINET and other industrial networks into field devices. It uses the same API for all supported protocols.

PTP Hybrid Clock (IEEE1588 – Precision Time Protocol)

Full standalone hardware only solution of a PTP Hybrid Clock (Combined PTP TC and OC)