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Creonic’s 5G LDPC Decoder and Encoder IP cores provide a perfect solution for this new LDPC structure with high level of flexibility while maintaining high throughput and low latency as required by the standard.
By Creonic GmbH
The Creonic CCSDS high performance wideband demodulator performs all tasks of an inner receiver.
The Creonic CCSDS high performance modulator performs all tasks of an inner transmitter.
The Creonic CCSDS AR4JA LDPC IP support the LDPC coding schemes as defined by the CCSDS standard.
The Creonic DOCSIS 3.1 LDPC decoder IP cores are a complete solution for the downstream forward error correction, i.e. PLC decoder, NCP decoder and data decoder are included.
The IP was developed to allow the performance evaluation of a low-earth orbit (LEO) digital communication system.
The Creonic DVB-C2 IP core integrates the forward error correction as defined by the standard (including LDPC and BCH decoder).
The Creonic DVB-GSE decapsulator performs the decapsulation of BBFRAMEs, containing one or more GSE packets.
The outstanding performance of the DVB-RCS turbo codes makes it the ideal candidate for further applications where high spectral efficiency is key for lowering costs.