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The outstanding error correction performance of the DVB-RCS2 turbo decoder makes it the ideal candidate for further applications where high spectral efficiency is key for lowering costs.
By Creonic GmbH
The Creonic DVB-S2 LDPC / BCH Decoder and Encoder IP cores perform forward error correction as defined within the standard.
The Creonic DVB-S2 high performance demodulator IP core performs all tasks of an inner receiver. Its output perfectly fits the DVB-S2 forward error correction IP core from Creonic that implements LDPC and BCH decoding.
The Creonic DVB-S2X demodulator is a low-complexity high-performance solution that allows for symbol rates of up to 100 MSymb/s on state-of-the-art FPGAs and performs all tasks of an inner receiver.
The Creonic DVB-S2X modulator is a low-complexity high-performance solution that allows for symbol rates of up to 250 MSymb/s (2 Gbit/s for 256-APSK) on state-of-the-art FPGAs.
The Creonic DVB-S2X high performance multi-carrier demodulator performs all tasks of an inner receiver while processing up to 36 carriers in parallel.
The Creonic DVB-S2X wideband decoder is a silicon-proven, scalable solution that allows for symbol rates of up to 500 Msymb/s on state-of-the-art FPGAs.
The Creonic DVB-S2X Wideband demodulator is a low-complexity high-performance solution that allows for symbol rates of up to 500 MSymb/s on state-of-the-art FPGAs.
The Creonic Fast Fourier Transform IP core implements the Decimation in Frequency - Fast Fourier Transform based on the Cooley-Tukey algorithm.